Ralf Jung aac65f562b rename BackendRepr::Vector → SimdVector

2025-02-28 17:17:45 +01:00

..

abi

rename BackendRepr::Vector → SimdVector

2025-02-28 17:17:45 +01:00

debuginfo

Merge commit '557ed8ebb7e981817d03c87352892c394183dd70' into sync_cg_clif-2025-02-15

2025-02-15 14:13:01 +00:00

driver

Move some Map methods onto TyCtxt.

2025-02-17 13:21:02 +11:00

intrinsics

rename BackendRepr::Vector → SimdVector

2025-02-28 17:17:45 +01:00

optimize

Reformat use declarations.

2024-07-29 08:26:52 +10:00

allocator.rs

Reformat using the new identifier sorting from rustfmt

2024-09-22 19:11:29 -04:00

analyze.rs

rename AddressOf -> RawBorrow inside the compiler

2024-08-18 19:46:53 +02:00

base.rs

Extend the renaming to coerce_unsafe_ptr

2025-02-10 13:01:55 +00:00

cast.rs

Rustfmt

2025-02-08 22:12:13 +00:00

codegen_i128.rs

Windows x86: Change i128 to return via the vector ABI

2025-01-27 12:12:59 +00:00

common.rs

Merge commit '557ed8ebb7e981817d03c87352892c394183dd70' into sync_cg_clif-2025-02-15

2025-02-15 14:13:01 +00:00

compiler_builtins.rs

Merge commit '8332329f83d4ef34479fec67cc21b21246dca6b5' into sync_cg_clif-2025-02-07

2025-02-07 20:58:27 +00:00

concurrency_limiter.rs

Remove jobserver from Session

2024-12-13 10:21:22 +00:00

config.rs

Merge commit '57845a397ec15e4e6a561ed2c4bfa3dcf49144fb' into sync_cg_clif-2024-12-06

2024-12-06 12:10:30 +00:00

constant.rs

cg_clif: use exclusively ABI alignment

2025-02-17 15:10:51 -08:00

discriminant.rs

make no-variant types a dedicated Variants variant

2024-12-18 11:01:54 +01:00

global_asm.rs

Make a fake body to store typeck results for global_asm

2025-02-22 00:12:07 +00:00

inline_asm.rs

Merge commit '557ed8ebb7e981817d03c87352892c394183dd70' into sync_cg_clif-2025-02-15

2025-02-15 14:13:01 +00:00

lib.rs

Make -O mean -C opt-level=3

2025-02-13 19:47:55 +00:00

linkage.rs

…

main_shim.rs

Rustfmt

2025-02-08 22:12:13 +00:00

num.rs

Merge commit 'e39eacd2d415803ef82de3b6a314e4f2d0fbc4dc' into sync_cg_clif-2025-01-10

2025-01-10 09:02:07 +00:00

pointer.rs

Merge commit '1fa693ca4462fc1f790693464cf765ad693616af' into sync_cg_clif-2024-11-09

2024-11-09 13:48:06 +00:00

pretty_clif.rs

Merge commit '1fa693ca4462fc1f790693464cf765ad693616af' into sync_cg_clif-2024-11-09

2024-11-09 13:48:06 +00:00

toolchain.rs

Merge commit 'e9d1a0a7b0b28dd422f1a790ccde532acafbf193' into sync_cg_clif-2022-08-24

2022-08-24 18:40:58 +02:00

trap.rs

Rustfmt

2025-02-08 22:12:13 +00:00

unsize.rs

Use ExistentialTraitRef throughout codegen

2025-01-30 15:34:00 +00:00

unwind_module.rs

Merge commit '49cd5dd454d0115cfbe9e39102a8b3ba4616aa40' into sync_cg_clif-2024-06-30

2024-06-30 11:28:14 +00:00

value_and_place.rs

rename BackendRepr::Vector → SimdVector

2025-02-28 17:17:45 +01:00

vtable.rs

Extend the renaming to coerce_unsafe_ptr

2025-02-10 13:01:55 +00:00