Daniel Paoliello 6906b44e1c Change __rust_no_alloc_shim_is_unstable to be a function

2025-06-16 10:54:07 -07:00

..

back

Mark all optimize methods and the codegen method as safe

2025-05-28 20:55:00 +00:00

builder

add custom enzyme markers to target methods

2025-04-25 11:09:52 +05:30

coverageinfo

Remove methods from StaticCodegenMethods that are not called in cg_ssa itself

2025-05-28 20:55:00 +00:00

debuginfo

Change tag_field to FieldIdx in Variants::Multiple

2025-06-03 23:42:21 -07:00

llvm

Use LLVMIntrinsicGetDeclaration to completely remove the hardcoded intrinsics list

2025-06-15 22:15:16 +05:30

abi.rs

add extern "custom" functions

2025-06-12 20:27:10 +02:00

allocator.rs

Change __rust_no_alloc_shim_is_unstable to be a function

2025-06-16 10:54:07 -07:00

asm.rs

Add f16 inline asm support for LoongArch

2025-06-14 09:39:30 +08:00

attributes.rs

use #[naked] for __rust_probestack

2025-06-10 10:08:57 +02:00

base.rs

Make predefine methods take &mut self

2025-05-28 20:55:00 +00:00

builder.rs

Correctly account for different address spaces in LLVM intrinsic invocations

2025-06-15 22:45:26 +05:30

callee.rs

don't depend on rustc_attr_parsing if rustc_data_structures will do

2025-05-09 23:16:55 +02:00

common.rs

Rename OperandBundleOwned to OperandBundleBox

2025-05-11 21:21:38 +10:00

consts.rs

store target.min_global_align as an Align

2025-06-07 22:06:42 +02:00

context.rs

Use LLVMIntrinsicGetDeclaration to completely remove the hardcoded intrinsics list

2025-06-15 22:15:16 +05:30

declare.rs

Make allocator shim creation mostly use safe code

2025-02-24 15:11:29 +00:00

errors.rs

-Zretpoline and -Zretpoline-external-thunk flags (target modifiers) to enable retpoline-related target features

2025-06-09 21:29:59 +07:00

intrinsic.rs

Correctly account for different address spaces in LLVM intrinsic invocations

2025-06-15 22:45:26 +05:30

lib.rs

Rollup merge of #141769 - bjorn3:codegen_metadata_module_rework, r=workingjubilee,saethlin

2025-06-15 23:51:54 +02:00

llvm_util.rs

-Zretpoline and -Zretpoline-external-thunk flags (target modifiers) to enable retpoline-related target features

2025-06-09 21:29:59 +07:00

mono_item.rs

Make predefine methods take &mut self

2025-05-28 20:55:00 +00:00

type_.rs

Use LLVMIntrinsicGetDeclaration to completely remove the hardcoded intrinsics list

2025-06-15 22:15:16 +05:30

type_of.rs

rename BackendRepr::Vector → SimdVector

2025-02-28 17:17:45 +01:00

va_arg.rs

implement va_arg for powerpc

2025-06-01 00:51:01 +02:00

value.rs

Add warn(unreachable_pub) to rustc_codegen_llvm.

2024-08-16 08:46:57 +10:00