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1870 Commits

Author SHA1 Message Date
Sparrow Li
15749b0ed3 Modify the implementation of d_s64 suffix instructions (#1167) 2021-05-19 03:43:53 +01:00
Jamie Cunliffe
a98b05c635 Add support for the remaining vget(q)_lane functions. (#1164) 2021-05-19 02:53:59 +01:00
Aaron Hill
750250023f Use #![feature(const_panic)] to produce better assertion errors (#1165) 2021-05-15 23:47:59 +01:00
Sparrow Li
09a05e02f4 Add vmull_p64 and vmull_high_p64 for aarch64 (#1157) 2021-05-15 21:58:23 +01:00
Sparrow Li
4a21f4db0e Add vqmovn neon instructions (#1163) 2021-05-14 12:32:58 +01:00
Ralf Jung
604ed7ebbf use simd_shuffle macros on wasm32 (#1162) 2021-05-13 13:48:20 +01:00
Ralf Jung
a34883b5d3 manually const-ify shuffle arguments (#1160) 2021-05-11 21:11:52 +01:00
SparrowLii
7516a80c31 Add vset neon instructions 2021-05-11 13:38:16 +01:00
Alex Crichton
2d9b71bca6 Add doc aliases for all wasm intrinsics 
Recommended in #74372
 2021-05-11 01:30:44 +01:00
Thom Chiovoloni
21c01768b7 Avoid using simd_f(min|max) in _mm256_(min|max)_p[sd] 2021-05-09 13:36:39 +01:00
Amanieu d'Antras
e9f73d0dc8 Fix asm! in bit-test intrinsics on x32 2021-05-08 19:40:07 +01:00
Amanieu d'Antras
994a4250a9 Use AT&T syntax to support LLVM 10 2021-05-07 23:19:18 +01:00
SparrowLii
8a2936b9a2 Completion of vcvt neon instruction 2021-05-07 23:02:39 +01:00
Ralf Jung
ed761b261c remvoe const_fn leftovers 2021-05-07 17:51:27 +01:00
Pietro Albini
1d6ff635c0 remove cfg(not(bootstrap)) for 1.54 2021-05-07 00:31:04 +01:00
SparrowLii
911ace84b2 Add vqrdmulh, vqrdmlah, vqrdmlsh neon instructions 2021-05-06 15:44:54 +01:00
Alex Crichton
128aa9a7e5 Update docs for v128_any_true 2021-05-03 15:56:41 +01:00
Alex Crichton
1d92c1d8b2 Another round of wasm SIMD updates 
This round is dependant on
https://github.com/rust-lang/llvm-project/pull/101 landing first in
rust-lang/rust and won't pass CI until that does. That PR, however, will
also break wasm CI because it's changing how the wasm target works. My
goal here is to open this early to get it out there so that when that PR
lands in rust-lang/rust and CI breaks in stdarch then this can be merged
to make CI green again.

The changes here are mostly around the codegen for various intrinsics.
Some wasm-specific intrinsics have been removed in favor of more general
LLVM intrinsics, and other intrinsics have been removed in favor of
pattern-matching codegen.

The only new instruction supported as part of this chagne is
`v128.any_true`. This leaves only one instruction unsupported in LLVM
which is `i64x2.abs`. I think the codegen for the instruction is correct
in stdsimd, though, and LLVM just needs to update with a pattern-match
to actually emit the opcode. That'll happen in a future LLVM update.
 2021-05-03 15:56:41 +01:00
Sparrow Li
fd29f9602c Add vmul_n, vmul_lane, vmulx neon instructions (#1147) 2021-04-30 21:09:41 +01:00
Sparrow Li
07f1d0cae3 Add vmla_n, vmla_lane, vmls_n, vmls_lane neon instructions (#1145) 2021-04-28 22:59:41 +01:00
scottmcm
54a2d8b82a Remove #![feature(try_trait)] from a test (#1142) 
I'm working on `try_trait_v2` which will break this, so I'm going
around removing uses from the rustc tree where I can.
 2021-04-26 00:45:20 +01:00
Amanieu d'Antras
63daa088fd Move cfg!(target_feature) directly into is_*_feature_detected!() (#1141) 
Fixes #1135
 2021-04-24 08:02:24 +01:00
Sparrow Li
8852d07441 add vcopy neon instructions (#1139) 2021-04-24 01:49:11 +01:00
Ralf Jung
03e109a2f3 remove unused const_fn feature (#1140) 2021-04-23 16:46:38 +01:00
Christopher Serr
a43f92a181 Add vrndn neon instructions (#1086) 
This adds the neon instructions for lane-wise rounding without actually
converting the lanes to integers.
 2021-04-22 06:08:40 +01:00
Sparrow Li
de3e8f72c5 Add vqdmul* neon instructions (#1130) 2021-04-21 15:27:08 +01:00
surechen
20c0120362 add neon instruction vaddlv_* (#1129) 2021-04-20 15:19:04 +01:00
Sparrow Li
6354de5993 Add vrshl, vrshr, vrshrn, vrsra, vsra neon instructions (#1127) 2021-04-19 17:49:44 +01:00
surechen
d46e0086e4 add neon instruction vfma_n_* (#1122) 2021-04-17 17:45:54 +01:00
Sebastian Thiel
43126c3f65 [DRAFT] intrinsics for all architectures appear in rustdoc (#1104) 2021-04-17 13:46:33 +01:00
Sparrow Li
e792dfd02c add vqshl, vqshrn, vqshrun neon instructions (#1120) 2021-04-16 13:22:39 +01:00
Amanieu d'Antras
0073d6ace3 Avoid using ebx as an asm! operand (#1121) 
It is sometimes reserved by LLVM.
 2021-04-16 13:20:00 +01:00
Sparrow Li
23f45cc955 Add vqrsh* neon instructions (#1119) 2021-04-15 12:29:04 +01:00
liushuyu
33afae1df7 aarch64: add uzp1, uzp2 instructions (#1118) 2021-04-15 12:21:31 +01:00
scottmcm
4e5d5c2e56 Typo fix: fist -> first (#1117) 2021-04-14 21:13:14 +01:00
surechen
aaaa9335eb add neon instruction vfma (#1116) 2021-04-14 15:34:53 +01:00
Amanieu d'Antras
6405058a6f Don't import from core (#1115) 
This breaks when core_arch is included as a module in core.
 2021-04-13 04:31:37 +01:00
Sparrow Li
88a5de08cb Allow primitive types in the code generator and add vdup instructions (#1114) 2021-04-12 14:08:26 +01:00
Joshua Nelson
b411a5c375 Convert all crates to 2018 edition (#1109) 2021-04-11 15:26:35 +01:00
Amanieu d'Antras
1bce95c732 Remove remaining uses of #[rustc_args_required_const] (#1113) 2021-04-11 14:22:52 +01:00
Sparrow Li
5ee0274cef add vshl and vshr neon instructions (#1111) 2021-04-09 08:49:23 +01:00
surechen
a3b5ef2b0c add neon instruction vsubw_* and vsubl_* (#1112) 2021-04-08 15:22:35 +01:00
Alex Crichton
c6356546c0 Updates for wasm simd support (#1110) 
* Uncomment some i64-related instruction assertions now that LLVM
  supports the opcodes.
* Fix the codegen for `{i,u}32x4_trunc_sat_f32x4`. This was originally
  introduced using `simd_cast` but that inherits LLVM's UB related to
  float-to-integer casts out of bounds. Since the original inception of
  these intrinsics in LLVM dedicated intrinsics for the wasm
  instructions have been added, so this swithces the implementation to
  using those.
* Uncomment `f64x2_convert_low_i32x4` instruction assertion and add a
  test now that this is implemented in Wasmtime.
 2021-04-07 17:05:34 +01:00
Joshua Nelson
7bab2c0695 Deny 2018 idiom lints (#1108) 
This lint is allow by default, which is why this wasn't spotted earlier.
It's denied by rust-lang/rust, so it's good to warn about it here so it
can be fixed more quickly.
 2021-04-07 05:46:39 +01:00
surechen
e6a81b7566 add neon instruction vmaxnm_f* vpmaxnm_f* vminnm_f* vpminnm_f* (#1105) 2021-04-06 06:57:05 +01:00
Sparrow Li
6201670dd2 Enable constant parameters in the code generator and add vext instructions (#1106) 2021-04-02 22:02:22 +01:00
Sparrow Li
7b21d85a41 add vmovn_high, vrbit, vrnd, vsubhn neon instructions (#1103) 2021-03-31 15:48:58 +01:00
surechen
ef9ec33482 add support for neon instruction vqabs_* (#1102) 2021-03-30 12:22:38 +01:00
Sparrow Li
64f84788c9 add vreinterpret neon instructions (#1101) 2021-03-30 06:51:01 +01:00
surechen
f9e5dfdd66 support neon instruction vabdl_* and vabdl_high_* (#1100) 2021-03-29 11:17:36 +01:00