Commit Graph

8 Commits

Author SHA1 Message Date
Patryk Wychowaniec
c2c4c8e146 fix: Add (even more) #[avr_skip] for floats
Tale as old as the world - there's an ABI mismatch:
https://github.com/rust-lang/compiler-builtins/pull/527

Fortunately, newest GCCs (from v11, it seems) actually provide most of
those intrinsics (even for f64!), so that's pretty cool.

(the only intrinsics not provided by GCC are `__powisf2` & `__powidf2`,
but our codegen for AVR doesn't emit those anyway.)

Fixes https://github.com/rust-lang/rust/issues/118079.
2023-11-26 16:17:00 +01:00
klensy
dd34581ec9 edition 2018 2023-08-07 21:04:25 +03:00
Aaron Kutch
1cf47804df Fix all clippy warnings 2021-04-02 08:58:50 -05:00
Aaron Kutch
cb4e9755b8 Remove WideInt 2020-12-07 23:26:13 -06:00
Alex Crichton
b2cfc3a4f1 Run rustfmt over everything 2019-05-14 14:40:38 -07:00
Paolo Teti
2986291965 __[mul/div]sf3vfp and __[mul/div]df3vfp only on ARM 2018-01-30 18:48:20 +01:00
Paolo Teti
9a4e458b48 Add support for mul[s/d]f3vfp and div[s/d]f3vfp
Here using `"C"` the compiler will use `"aapcs"` or `"aapcs-vfp"`
depending on target configuration.

Of course this translates in a call to `__aeabi_fdiv` / `__aeabi_fmul`
on non-HF targets.

On `eabi` targets with +vfpv2/vfpv3 LLVM generate:

   vmov	s0, r1
   vmov	s2, r0
   vdiv.f32	s0, s2, s0
   vmov	r0, s0
   bx	lr

On `eabihf` targets with +vfpv3-d16/d32/f32 +fp-only-sp LLVM generate:

  vdiv.f32	s0, s0, s1
  bx	lr

That's exactly what We need for [div/mul][s/d]f3vfp.S
2018-01-29 20:49:55 +01:00
Oliver Geller
5923e278c3 Implement mulsf3 and muldf3 2017-11-08 17:36:34 -05:00