Commit Graph

1896 Commits

Author SHA1 Message Date
Folkert de Vries
a50bd7ca24 store target.min_global_align as an Align 2025-06-07 22:06:42 +02:00
sayantn
632396ea01 Stabilize sha512_sm_x86, and the sha512, sm3 and sm4 target features 2025-06-07 23:27:15 +05:30
sayantn
cd7533ab44 Stabilize the keylocker_x86 flag, and the kl and widekl target features 2025-06-07 23:25:47 +05:30
Jacob Pratt
1c8b09639c Rollup merge of #141797 - workingjubilee:apple-likes-frame-pointers-but-not-that-much, r=madsmtm
compiler: set Apple frame pointers by architecture

All Apple targets stop overriding this configuration and instead use the default base of FramePointer::NonLeaf, which means some Apples will have less frame pointers in leaf functions.

r? ``@madsmtm``

cc ``@thomcc``
2025-06-07 07:05:46 +02:00
Jubilee Young
b25aa26298 compiler: set Apple frame pointers by architecture
Apple targets can now overriding this configuration and instead use the
default based on their architecture, which means aarch64 targets now
have less frame pointers in leaf functions.
2025-06-06 10:07:32 -07:00
Jubilee Young
d945c8562b compiler: Add track_caller to AbiMapping::unwrap
Same reason as it is on Option's.
2025-06-05 23:09:31 -07:00
WANG Rui
38d69c3f57 Add new Tier-3 targets: loongarch32-unknown-none*
MCP: https://github.com/rust-lang/compiler-team/issues/865
2025-06-06 08:19:38 +08:00
WANG Rui
27f8efbae2 Bump object 2025-06-05 07:59:51 +08:00
bors
ff223d35cd Auto merge of #141309 - RalfJung:x86-simd-abi, r=tgross35,nikic,workingjubilee
x86 (32/64): go back to passing SIMD vectors by-ptr

Fixes https://github.com/rust-lang/rust/issues/139029 by partially reverting https://github.com/rust-lang/rust/pull/135408 and going back to passing SIMD vectors by-ptr on x86. Sadly, by-val confuses the LLVM inliner so much that it's not worth it...

Also fixes https://github.com/rust-lang/rust/issues/141848 by no longer actually using vector registers with the "Rust" ABI.

r? `@tgross35`
Cc `@nikic`

try-job: `test-various*`
try-job: dist-i586-gnu-i586-i686-musl
try-job: x86_64-gnu-nopt
try-job: `x86_64-msvc*`
try-job: `i686-msvc*`
2025-06-04 21:05:52 +00:00
Ralf Jung
321db85fb4 x86 (32/64): go back to passing SIMD vectors by-ptr 2025-06-04 08:38:49 +02:00
Matthias Krüger
59bdb5c3cf Rollup merge of #141250 - folkertdev:s390x-z17-target-features, r=workingjubilee
add s390x z17 target features

tracking issue: https://github.com/rust-lang/rust/issues/130869

earlier target features were added in https://github.com/rust-lang/rust/pull/135630, and https://github.com/rust-lang/rust/issues/135413#issuecomment-2886439455 has some extra context on these new features.

r? ``@ghost``
cc ``@uweigand``
2025-06-04 07:54:33 +02:00
Matthias Krüger
644f06ec1f Rollup merge of #141569 - workingjubilee:canonicalize-abi, r=bjorn3
Replace ad-hoc ABI "adjustments" with an `AbiMap` to `CanonAbi`

Our `conv_from_spec_abi`, `adjust_abi`, and `is_abi_supported` combine to give us a very confusing way of reasoning about what _actual_ calling convention we want to lower our code to and whether we want to compile the resulting code at all. Instead of leaving this code as a miniature adventure game in which someone tries to combine stateful mutations into a Rube Goldberg machine that will let them escape the maze and arrive at the promised land of codegen, we let `AbiMap` devour this complexity. Once you have an `AbiMap`, you can answer which `ExternAbi`s will lower to what `CanonAbi`s (and whether they will lower at all).

Removed:
- `conv_from_spec_abi` replaced by `AbiMap::canonize_abi`
- `adjust_abi` replaced by same
- `Conv::PreserveAll` as unused
- `Conv::Cold` as unused
- `enum Conv` replaced by `enum CanonAbi`

target-spec.json changes:
- If you have a target-spec.json then now your "entry-abi" key will be specified in terms of one of the `"{abi}"` strings Rust recognizes, e.g.
```json
    "entry-abi": "C",
    "entry-abi": "win64",
    "entry-abi": "aapcs",
```
2025-06-03 21:53:36 +02:00
Jubilee Young
307a18dc53 compiler: actually remove Conv now that it is irrelevant 2025-06-03 10:08:11 -07:00
Jubilee Young
2351a3e5b4 compiler: simplify TargetOptions ABI functions
`adjust_abi` is not needed and `is_abi_supported` can be a 1-liner.
2025-06-03 10:04:19 -07:00
Jubilee Young
72ecde27ff compiler: change Conv to CanonAbi 2025-06-03 10:03:44 -07:00
Jubilee Young
2d637f70a8 compiler: use CanonAbi for entry_abi
makes entry_abi a lowering of the ABI string, so now it can be
```json
  "entry_abi": "C",
  "entry_abi": "win64",
  "entry_abi": "aapcs",
```
2025-06-03 10:02:44 -07:00
Jubilee Young
c04e2490ef compiler: add AbiMap
- Add AbiMapping for encoding the nuance of deprecated ABIs
2025-06-03 09:58:52 -07:00
Jubilee Young
f57ed46bc6 compiler: add CanonAbi 2025-05-31 12:36:01 -07:00
Mateusz Mikuła
7e9aee773a Enable non-leaf Frame Pointers for mingw-w64 Arm64 Windows 2025-05-31 14:27:26 +02:00
Berrysoft
9281958c6a Add tls_model for cygwin and enable has_thread_local 2025-05-30 00:23:18 +08:00
quininer
1758f07cb8 Enable xray support for Mac
* https://maskray.me/blog/2023-06-18-port-llvm-xray-to-apple-systems
* https://github.com/llvm/llvm-project/blob/llvmorg-20.1.4/clang/lib/Driver/XRayArgs.cpp#L31
2025-05-24 15:06:53 +08:00
Matthias Krüger
d6a61daf60 Rollup merge of #140832 - workingjubilee:aarch64-linux-should-use-frame-pointers, r=compiler-errors
aarch64-linux: Default to FramePointer::NonLeaf

For aarch64-apple and aarch64-windows, platform docs state that code must use frame pointers correctly. This is because the AAPCS64 mandates that a platform specify its frame pointer conformance requirements:
- Apple: https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms#Respect-the-purpose-of-specific-CPU-registers
- Windows: https://learn.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=msvc-170#integer-registers
- AAPCS64: 4492d1570e/aapcs64/aapcs64.rst (the-frame-pointer)

Unwinding code either requires unwind tables or frame pointers, and on aarch64 the expectation is that one can use frame pointers for this. Most Linux targets represent a motley variety of possible distributions, so it is unclear who to defer to on conformance, other than perhaps Arm. In the absence of a specific edict for a given aarch64-linux target, Rust will assume aarch64-linux targets also use non-leaf frame pointers. This reflects what compilers like clang do.
2025-05-23 20:30:09 +02:00
Ralf Jung
30c87defe6 aarch64-softfloat: forbid enabling the neon target feature 2025-05-22 12:19:25 +02:00
Folkert de Vries
c24e1c378f add s390x z17 target features 2025-05-19 17:40:37 +02:00
León Orell Valerian Liehr
2f6811eff8 Rollup merge of #138940 - sayantn:stabilize-avx512, r=Amanieu,traviscross
Stabilize the avx512 target features

This PR stabilizes the AVX512 target features - see [this comment](https://github.com/rust-lang/rust/issues/111137#issuecomment-2745821279).

Tracking Issue - #44839

The target feature UI tests have been changed to `x87` (chosen because this is very unlikely to stablize ever, please comment if some other feature will be better)

related: #111137
2025-05-18 18:44:10 +02:00
León Orell Valerian Liehr
e323c64fa4 Rollup merge of #141045 - dpaoliello:noarmhazard, r=jieyouxu
[win][arm64] Remove 'Arm64 Hazard' undocumented MSVC option and instead disable problematic test

PR #140758 added the undocumented `/arm64hazardfree` MSVC linker flag to work around a test failure where LLVM generated code that would trip a hazard in an outdated ARM processor.

Adding this flag caused issues with LLD, as it doesn't recognize it.

Rethinking the issue, using the undocumented flag seems like the incorrect solution: there's no guarantee that the flag won't be removed in the future, or change its meaning.

Instead, I've disabled the problematic test for Arm64 Windows and have filed a bug with the MSVC team to have the check removed: <https://developercommunity.microsoft.com/t/Remove-checking-for-and-fixing-Cortex-A/10905134>

This PR supersedes #140977

r? ```@jieyouxu```
2025-05-18 11:03:46 +02:00
sayantn
cf7caded0b Stabilize avx512_target_feature 2025-05-18 11:12:15 +05:30
Matthias Krüger
836db3ccae Rollup merge of #135808 - tiif:conv_display, r=workingjubilee
Implement Display for ``rustc_target::callconv::Conv``

Follow up of https://github.com/rust-lang/rust/pull/133103#discussion_r1885552854
2025-05-17 15:45:19 +02:00
Jubilee Young
0c157b51d3 aarch64-linux: Default to FramePointer::NonLeaf
For aarch64-apple and aarch64-windows, platform docs state that code
must use frame pointers correctly. This is because the AAPCS64 mandates
that a platform specify its frame pointer conformance requirements:
- Apple: https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms#Respect-the-purpose-of-specific-CPU-registers
- Windows: https://learn.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=msvc-170#integer-registers
- AAPCS64: 4492d1570e/aapcs64/aapcs64.rst (the-frame-pointer)

Unwinding code either requires unwind tables or frame pointers, and
on aarch64 the expectation is that one can use frame pointers for this.
Most Linux targets represent a motley variety of possible distributions,
so it is unclear who to defer to on conformance, other than perhaps Arm.
In the absence of a specific edict for a given aarch64-linux target,
Rust will assume aarch64-linux targets use non-leaf frame pointers.
This reflects what compilers like clang do.
2025-05-17 06:42:46 +02:00
Daniel Paoliello
6128fca0b0 [win][arm64] Remove 'Arm64 Hazard' undocumented MSVC option and instead disable problematic test 2025-05-15 11:33:28 -07:00
Jieyou Xu
734a5b1aa7 Revert "Fix linking statics on Arm64EC #140176"
Unfortunately, multiple people are reporting linker warnings related to
`__rust_no_alloc_shim_is_unstable` after this change. The solution isn't
quite clear yet, let's revert to green for now, and try a reland with a
determined solution for `__rust_no_alloc_shim_is_unstable`.

This reverts commit c8b7f32434, reversing
changes made to 667247db71.
2025-05-15 16:54:27 +08:00
bors
4eca99a18e Auto merge of #140887 - pietroalbini:pa-bootstrap-update, r=compiler-errors
Stage0 bootstrap update

This PR [follows the release process](https://forge.rust-lang.org/release/process.html#master-bootstrap-update-tuesday) to update the stage0 compiler.

The only thing of note is 58651d1b31, which was flagged by clippy as a correctness fix. I think allowing that lint in our case makes sense, but it's worth to have a second pair of eyes on it.

r? `@Mark-Simulacrum`
2025-05-13 09:54:28 +00:00
Pietro Albini
2ce08ca5d6 update cfg(bootstrap) 2025-05-12 15:33:37 +02:00
tiif
41a2260bc7 Use unreachable instead of panic
Co-authored-by: bjorn3 <17426603+bjorn3@users.noreply.github.com>
2025-05-12 09:23:30 +02:00
bors
3528a5b76d Auto merge of #140915 - matthiaskrgr:rollup-lxce4zr, r=matthiaskrgr
Rollup of 3 pull requests

Successful merges:

 - #140397 (Add T-compiler backports Zulip notifications)
 - #140851 (Warn when `#[export_name]` is used with generic functions)
 - #140862 (Enable non-leaf Frame Pointers for Arm64EC Windows)

r? `@ghost`
`@rustbot` modify labels: rollup
2025-05-11 15:46:50 +00:00
bors
9a7e19f2b6 Auto merge of #135015 - heiher:stabilize-loongarch-target-features, r=Amanieu
Partially stabilize LoongArch target features

Stabilization PR for the LoongArch target features. This PR stabilizes some of the target features tracked by #44839.

Specifically, this PR stabilizes the following target features:

* f
* d
* frecipe
* lasx
* lbt
* lsx
* lvz

Docs PR: https://github.com/rust-lang/reference/pull/1707

r? `@Amanieu`
2025-05-11 06:10:41 +00:00
Daniel Paoliello
35679bad98 Enable non-leaf Frame Pointers for Arm64EC Windows 2025-05-09 11:44:22 -07:00
Stuart Cook
d91e86e963 Rollup merge of #140828 - dpaoliello:arm64fp, r=workingjubilee
Enable non-leaf Frame Pointers for Arm64 Windows

Microsoft recommends enabling frame pointers for Arm64 Windows as it enables fast stack walking, from <https://learn.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=msvc-170#integer-registers>:

> The frame pointer (x29) is required for compatibility with fast stack walking used by ETW and other services. It must point to the previous {x29, x30} pair on the stack.

I'm setting this to "non-leaf" as leaf functions shouldn't be spilling registers and so won't touch the frame pointer.
2025-05-09 16:25:06 +10:00
WANG Rui
72393a672d Partially stabilize LoongArch target features 2025-05-09 11:01:05 +08:00
bors
c8b7f32434 Auto merge of #140176 - dpaoliello:arm64ecdec, r=wesleywiser
Fix linking statics on Arm64EC

Arm64EC builds recently started to fail due to the linker not finding a symbol:
```
symbols.o : error LNK2001: unresolved external symbol #_ZN3std9panicking11EMPTY_PANIC17hc8d2b903527827f1E (EC Symbol)
          C:\Code\hello-world\target\arm64ec-pc-windows-msvc\debug\deps\hello_world.exe : fatal error LNK1120: 1 unresolved externals
```

It turns out that `EMPTY_PANIC` is a new static variable that was being exported then imported from the standard library, but when exporting LLVM didn't prepend the name with `#` (as only functions are prefixed with this character), whereas Rust was prefixing with `#` when attempting to import it.

The fix is to have Rust not prefix statics with `#` when importing.

Adding tests discovered another issue: we need to correctly mark static exported from dylibs with `DATA`, otherwise MSVC's linker assumes they are functions and complains that there is no exit thunk for them.

CI found another bug: we only apply `DllImport` to non-local statics that aren't foreign items (i.e., in an `extern` block), that is we want to use `DllImport` for statics coming from other Rust crates. However, `__rust_no_alloc_shim_is_unstable` is a static generated by the Rust compiler if required, but downstream crates consider it a foreign item since it is declared in an `extern "Rust"` block, thus they do not apply `DllImport` to it and so fails to link if it is exported by the previous crate as `DATA`. The fix is to apply `DllImport` to foreign items that are marked with the `rustc_std_internal_symbol` attribute (i.e., we assume they aren't actually foreign and will be in some Rust crate).

Fixes #138541

---
try-job: dist-aarch64-msvc
try-job: dist-x86_64-msvc
try-job: x86_64-msvc-1
try-job: x86_64-msvc-2
2025-05-09 00:43:28 +00:00
Daniel Paoliello
d951c41a68 Enable non-leaf Frame Pointers for Arm64 Windows 2025-05-08 13:18:18 -07:00
Matthias Krüger
54f1da4486 Rollup merge of #140758 - dpaoliello:armhazard, r=jieyouxu
[win][arm64] Disable MSVC Linker 'Arm Hazard' warning

While trying to get the aarch64-msvc build working correctly (#140136), I observed the following test failure:

From <https://github.com/rust-lang/rust/pull/140136#issuecomment-2848179657>

```
  = note: main.main.d17f5fbe6225cf88-cgu.0.rcgu.o : fatal error LNK1322: cannot avoid potential ARM hazard (Cortex-A53 MPCore processor bug #843419) in section 0x57; please consider using compiler option /Gy if it was not used
```

This is warning of a code sequence that triggers a bug in Cortex-A53 processors: <https://developer.arm.com/documentation/epm048406/latest>

However, since Windows 10 isn't supported on the Cortex-A53, this warning is not required, so it can be suppressed using the undocumented `/arm64hazardfree` flag.
2025-05-08 13:55:45 +02:00
Daniel Paoliello
75ca6c621e [win][arm64] Disable MSVC Linker 'Arm Hazard' warning 2025-05-07 12:02:14 -07:00
Daniel Paoliello
6dabf7ea3a [Arm64EC] Only decorate functions with # 2025-05-07 10:36:12 -07:00
Jacob Pratt
4a8dbe0537 Rollup merge of #139534 - madhav-madhusoodanan:apx-target-feature-addition, r=workingjubilee
Added support for `apxf` target feature
2025-05-07 00:29:21 +00:00
Madhav Madhusoodanan
43357b4a64 Added apxf target feature support, under flag apx_target_feature 2025-05-06 23:28:27 +05:30
smrobtzz
57941afb23 Apply suggestions from code review
Co-authored-by: Jubilee <workingjubilee@gmail.com>
2025-05-05 12:34:09 -04:00
Sam Roberts
fa6d0d1ba2 Use more accurate ELF flags on MIPS 2025-05-05 12:23:41 -04:00
Stuart Cook
ed7590f1a0 Rollup merge of #139675 - sayantn:avx10, r=Amanieu
Add the AVX10 target features

Parent #138843

Adds the `avx10_target_feature` feature gate, and `avx10.1` and `avx10.2` target features.

It is confirmed that Intel is dropping AVX10/256 (see [this comment](https://github.com/rust-lang/rust/issues/111137#issuecomment-2795442288)), so this should be safe to implement now.

The LLVM fix for llvm/llvm-project#135394 was merged, and has been backported to LLVM20, and the patch has also been propagated to rustc in #140502

`@rustbot` label O-x86_64 O-x86_32 A-target-feature A-SIMD
2025-05-04 13:21:07 +10:00
Stuart Cook
19c9b763ba Rollup merge of #140507 - a4lg:riscv-feature-addition-batch-3, r=Amanieu
rustc_target: RISC-V: feature addition batch 3

This is the last batch (3 of 3) for RISC-V feature enhancements intended for the version 1.88 cycle.

The author's primary criteria are:

1.  The extension is ratified and unprivileged one.
2.  The extension is in the RVA23U64 profile (to be a baseline of the application-class RISC-V software ecosystem in the near future), either mandatory or optional.
3.  Either:
    1.  To be discoverable through a `riscv_hwprobe` system call on (currently unreleased) Linux 6.15 (as of rc4) or
    2.  Helps memory/atomics-related operations more efficient and/or more robust.

This is based on the specifications:

*   [The latest ratified ISA Manuals (version 20240411)](https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154769/RISC-V+Technical+Specifications)
*   [RVA23/RVB23 profiles](https://github.com/riscv/riscv-profiles/releases/tag/rva23-rvb23-ratified)
*   [RISC-V BF16 extensions](https://github.com/riscv/riscv-bfloat16/releases/tag/v183a3dac863d7c18187a739eb52b0c8f0d16854d)

LLVM Definitions:

*   [`Zicbop`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L82-87)
*   [`Zicbom`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L75-L80)
*   [`Zic64b`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L71-L73)
*   [`Ziccamoa`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L97-L99)
*   [`Ziccif`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L101-L103)
*   [`Zicclsm`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L105-L107)
*   [`Ziccrse`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L109-L111)
*   [`Zfbfmin`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L320-L325)
*   [`Zvfbfmin`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L697-L702)
*   [`Zvfbfwma`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L704-L710)

The `Zicbop` extension (mandatory in RVA23U64) adds prefetch hints to prepare for subsequent memory operations (will be executed as no-op if the hardware does not support this extension).

The `Zicbom` extension (mandatory in RVA23U64) adds cache block-management instructions.  The author did not include this in the batch 2 (because of limited use cases compared to the `Zicboz` extension) but added because it will be discoverable from Linux (as of version 6.15-rc4).  Along with `Zicbop`, Rust now supports all CMO extensions.

The `Zic64b` extension (mandatory in RVA23U64) constraints the cache block to be naturally-aligned and exactly 64 bytes.  Along with CMO instructions, it can improve efficiency handling with memory (e.g. efficient memory zeroing using `Zicboz` + `Zic64b`).

The `Zicc*` extensions (mandatory in RVA23U64) add constraints to the main memory properties.  They are normally satisfied in the application environment with regular OSes but profiles like RVA23U64 ensures such properties are satisfied (through those *constraint* extensions).

The `Zfbf*` and `Zvfbf*` extensions (optional in RVA23U64) add instructions to handle BF16 (BFloat16) data.  Although stabilization of FP-related extensions are relatively far due to ABI-related issues, they are included in this batch because they will be discoverable from Linux (as of version 6.15-rc4).

The author also adds the extension implication: `Za64rs` → `Za128rs` (superset) which the author missed to include in #140139.
2025-05-02 22:17:03 +10:00