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2629 Commits

Author SHA1 Message Date
gnzlbg
82274aadc1 re-format (#544) 2018-07-31 08:03:22 -07:00
Paolo Teti
608265e15d Dual 16-bit Signed Multiply with Addition/Subtraction (#543) 
Add support for `smlad` and `smlsd`.

- `smlad`: Dual 16-bit Signed Multiply with Addition and
           32-bit accumulation

- `smlsd`: Dual 16-bit Signed Multiply with Subtraction and
           32-bit accumulation
 2018-07-27 10:00:28 -07:00
Luca Barbato
923ed00d4d Add Vector Multiply Even and Vector Multiply Odd (#542) 2018-07-26 17:12:44 -07:00
Luca Barbato
03a4a3ae30 Add more mixed arithmetic instructions (#541) 
* Add Vector Multiply Add

* Add Vector Negative Multiply Subtract

* Add Vector Sum Across Partial (1/2) Saturated

* Add Vector Sum Across Partial (1/4) Saturated
 2018-07-26 13:43:08 -07:00
Luca Barbato
4db62cdf71 Move the vsx code to powerpc (#538) 
Even if it is unlikely to happen the VSX instructions can be executed in
32bit mode just as well.
 2018-07-25 19:30:57 -05:00
Luca Barbato
eaa2ea8016 One more instruction and further refinements (#521) 
* Add more inline and target_feature decorators

* Add Vector Multiply Low and Add Unsigned Half Word

* Add Vector Multiply Sum
 2018-07-25 03:57:14 -05:00
Paolo Teti
80fa53ad7c ARM ARM DSP/SIMD32: Sum of 8-bit absolute differences (#537) 
- `usad8`: Sum of 8-bit absolute differences
- `usad8a`: Sum of 8-bit absolute differences and constant (usad8(a, b) + c)
 2018-07-24 14:00:28 -05:00
Jorge Aparicio
5fe4272376 generate docs for Cortex-M / Cortex-R intrinsics (#536) 2018-07-24 11:02:33 -05:00
Paolo Teti
c2f7e244d0 ARM DSP: Halving parallel add/sub and multiply add/sub (#535) 
* ARM DSP: Add signed halving parallel sub.

Add:

- `shsub8`: Signed halving parallel byte-wise subtraction.
- `shsub16`: Signed halving parallel halfword-wise subtraction.

* ARM DSP: Signed halving parallel additions.

- `shadd8`: Signed halving parallel byte-wise add.
- `shadd16`: Signed halving parallel halfword-wise add.

* ARM DSP: Signed Dual Multiply Add and Signed Dual Multiply Sub.

- `SMUAD`: Signed Dual Multiply Add.
- `SMUADX`: Signed Dual Multiply Add Reversed.
- `SMUSD`: Signed Dual Multiply Subtract.
- `SMUSDX`: Signed Dual Multiply Subtract Reversed.

* ARM DSP: Restrict to Cortex-A and Cortex-R

Restrict everything to Cortex-A/R till We found a better way manage
thumb* targets.

Add 'dox' to generate docs.

* ARM DSP: fix Markdown documentation

Quote '[' and ']' where are not part of the Markdown syntax.
 2018-07-23 16:32:05 -05:00
Paolo Teti
8889d6a500 ARM DSP: fix intra_doc_link_resolution_failure (#534) 
Escape '[' and ']' used for arrays and not as Markdown syntax
 2018-07-23 09:01:48 -05:00
Paolo Teti
8d663bd234 Fix x86 build on latest nightly (#533) 
`cargo test --no-run` raise:

```
error[E0432]: unresolved import
  --> crates/coresimd/src/../../../coresimd/x86/rdtsc.rs:62:9
   |
62 |     use coresimd::x86::rdtsc;
   |         ^^^^^^^^^^^^^^^^^^^^
```
 2018-07-22 10:58:21 -05:00
Paolo Teti
f0eb5e1b3b ARM DSP: add Quad/Double add/sub with exchange and select bytes intrinsics (#532) 
- Quad 8-bit addition/subtraction
- Double 8-bit addition/subtraction
- Saturating Add and Subtract with Exchange and
  Saturating Subtract and Add with Exchange, signed
- Select bytes based on GE bits

This patch bump the `assert_instr` limit to 22 (from 20) instead of
add a lots of exception for all DSP intrinsics.
 2018-07-21 10:51:18 -05:00
Paolo Teti
e0504ce54a Add few ARM DSP Intrinsics (#529) 
* Add few ARM DSP Intrinsics

- Signed saturating add/sub
- Saturating four 8-bit integer add/sub
- Saturating two 8-bit integer add/sub

The intent is mainly to setup the module and to add all
the rest in the future.

Listed intrinsics are available on Cortex-M too (+dsp is required
on some model except for M4).

* Arm DSP: rebase and remove portable vector types

Rebase everything on top of master since the portable vector types
have been removed.
 2018-07-20 11:54:52 -05:00
Alex Crichton
f1e4ebd8de Fix compile of stdsimd on powerpc with no flags (#531) 
We're running into issues updating with rust-lang/rust#52535, so we need to get
this working without `RUSTFLAGS` enabling the `altivec` feature
 2018-07-20 11:54:33 -05:00
Jorge Aparicio
15813c3dcd add links to standard, API and implementation to the module level docs 2018-07-19 02:45:51 +02:00
Jorge Aparicio
e894731ccd add thumb targets to ci 2018-07-19 02:45:51 +02:00
Jorge Aparicio
438a0f5eeb add #[assert_instr(...)] 2018-07-19 02:45:51 +02:00
Jorge Aparicio
3c33e3dd3e add #[target_feature(enable = ...)] 2018-07-19 02:45:51 +02:00
Jorge Aparicio
bdb74ed658 add CMSIS / Cortex-M instrinsics 2018-07-19 02:45:51 +02:00
gnzlbg
1c09cc76c4 LLVM7 generates different machine than LLVM6 for x86/x86_64 targets for some intrinsics. These are new optimizations 2018-07-19 00:10:44 +02:00
gnzlbg
faafc284bd remove portable vector types 2018-07-19 00:10:44 +02:00
Alex Crichton
f3cb25b8f9 Fix compile on latest nightly (#527) 
The `proc_macro` feature has stabilized in the compiler and usage of it largely
needs to switch to `use_extern_macros` now.
 2018-07-17 09:30:18 -05:00
Cameron Hart
d89dc542ec Make _MM_SHUFFLE unstable. (#524) 2018-07-14 18:45:51 -05:00
Steve Klabnik
99102f4bcd fix some doc links (#520) 2018-07-11 09:18:28 -05:00
Luca Barbato
8d8d81aa35 Drop the not really supported PowerPC 32bit target 
The LLVM backend has known issues and even for them the main
development target is PowerPC 64bit Little Endian.
 2018-07-11 15:41:07 +02:00
Luca Barbato
77243a10a1 Check the documentation for the supported powerpc64 
PowerPC 64bit Little Endian is the main development target currently.
 2018-07-11 15:41:07 +02:00
Luca Barbato
409f648047 Make the dox.sh more verbose 
Make easier spot where the errors happen.
 2018-07-11 15:41:07 +02:00
Luca Barbato
2260f0af17 Add Vector Multiply Sum Saturated 2018-07-11 15:41:07 +02:00
TheIronBorn
83e5d232ac add swap_bytes/to_le/to_be (#517) 
* add large shuffle intrinsics

* add swap_bytes/to_le

* add to_be

* more tests

* improve swap_bytes tests
 2018-07-10 10:20:52 +02:00
dependabot[bot]
e0752318f7 Update cupid requirement to 0.6.0 
Updates the requirements on [cupid](https://github.com/shepmaster/cupid) to permit the latest version.
- [Release notes](https://github.com/shepmaster/cupid/releases)
- [Commits](https://github.com/shepmaster/cupid/commits/v0.6.0)

Signed-off-by: dependabot[bot] <support@dependabot.com>
 2018-07-06 23:26:44 +00:00
dependabot[bot]
df3fac4bfb Update lazy_static requirement to 1.0 
Updates the requirements on [lazy_static](https://github.com/rust-lang-nursery/lazy-static.rs) to permit the latest version.
- [Release notes](https://github.com/rust-lang-nursery/lazy-static.rs/releases)
- [Commits](https://github.com/rust-lang-nursery/lazy-static.rs/commits/v1.0.1)

Signed-off-by: dependabot[bot] <support@dependabot.com>
 2018-07-06 21:46:33 +00:00
dependabot[bot]
42321c7f4e Update rand requirement to 0.5 
Updates the requirements on [rand](https://github.com/rust-lang-nursery/rand) to permit the latest version.
- [Release notes](https://github.com/rust-lang-nursery/rand/releases)
- [Changelog](https://github.com/rust-lang-nursery/rand/blob/master/CHANGELOG.md)
- [Commits](https://github.com/rust-lang-nursery/rand/commits/0.5.3)

Signed-off-by: dependabot[bot] <support@dependabot.com>
 2018-07-06 21:26:25 +00:00
Brandon Falk
625c31200a Fix PartialEq issue #511 2018-07-02 10:26:51 +02:00
Luca Barbato
22d5f8ca33 Test vec_mradds and not vec_madds 
Typo introduced in 1d6ccad0136cd1ed97dbb83b4975d8feb6fec059
 2018-06-28 09:12:28 +02:00
Luca Barbato
5c00a2b2a4 Add vector multiply round and add saturated 2018-06-28 00:34:14 +02:00
gnzlbg
f55d7be7c9 deprecate read/write eflags (#494) 2018-06-27 13:32:11 -05:00
gnzlbg
0402aba4be allow dead code in reduction tests 2018-06-26 14:54:07 +02:00
gnzlbg
ea6d2b47af [s390x] Fall back to scalar math for portable floating-point vector operations. 
I've opened #501 to track the workarounds introduced here.

Closes #498.
 2018-06-26 14:54:07 +02:00
gnzlbg
d5cf70cac5 [s390x] add CI 
This commit tests `s390x-unknown-linux-gnu` on CI using `qemu-user`.

Closes #499 .
 2018-06-26 14:54:07 +02:00
gnzlbg
8287afe0cb Optimize has_cpuid for x86 Rust targets that have cpuid 
Improves #497.
 2018-06-26 14:53:57 +02:00
gnzlbg
6fa79873e3 Document what the xcr0 masks do 2018-06-26 14:53:46 +02:00
gnzlbg
a0a6e784fb fma requires osxsave 2018-06-26 14:53:46 +02:00
gnzlbg
ae64d7a468 Calling xgetbv is safe only if the OS has set osxsave. 
Closes #500.
 2018-06-26 14:53:46 +02:00
gnzlbg
f72da708eb fix all nursery doc links 2018-06-26 14:03:57 +02:00
gnzlbg
771dc9fd8e hoist the and out of the inline assembly 2018-06-25 10:16:15 +02:00
gnzlbg
7affba30a5 use and to test the 21st bit 2018-06-25 10:16:15 +02:00
gnzlbg
d6290b5e88 remove unnecesary unsafe block 2018-06-25 10:16:15 +02:00
gnzlbg
a84c619bf3 remove unnecessary shift 2018-06-25 10:16:15 +02:00
gnzlbg
637541bd83 Use Stephen Checkoway solution 2018-06-25 10:16:15 +02:00
gnzlbg
7e710e7e4a fix the shift 2018-06-25 10:16:15 +02:00