Commit Graph

2551 Commits

Author SHA1 Message Date
Alex Crichton
fa924e754d Fix doc builds 2018-03-22 11:43:05 -07:00
Alex Crichton
874829e4a9 rustfmt 2018-03-22 11:34:50 -07:00
Jason Davies
de82d9d26b Add support for Intel SHA extensions. (#395) 2018-03-22 13:32:44 -05:00
gnzlbg
56d9a42a2f add tests for endian-dependent behavior (#394)
* add tests for endian-dependent behavior

* format
2018-03-22 11:09:01 -05:00
gnzlbg
db819cb932 remove clone impls (#389)
Closes #386 .
2018-03-20 10:14:26 -05:00
gnzlbg
ff53ec6cb2 add arm neon vector types (#384) 2018-03-20 09:11:50 -05:00
gnzlbg
5f77210b34 add vector/scalar ops (#381) 2018-03-19 15:08:27 -05:00
gnzlbg
0dc39beed6 add llvm bug for reductions on aarch64 (#385) 2018-03-19 09:48:04 -05:00
gnzlbg
f107499c51 add missing fmt implementations (#380) 2018-03-19 09:44:57 -05:00
gnzlbg
68c53c1e55 Split protable vector types tests into multiple crates (#379)
* split the portable vector tests into separate crates

* use rustc reductions
2018-03-18 10:55:20 -05:00
Alex Crichton
44763c853d Fix tests on nightly (#378) 2018-03-16 13:06:07 -05:00
gnzlbg
2762e2ca9a [mips/mips64: msa] add add_a_b intrinsic (#365)
* [mips64/msa] add add_a_b intrinsic

* add make/file to mips64el's Dockerfile

* add run-time detection support for mips64

* add mips64 build bot

* generate docs for mips64

* fix linux test

* cleanup rt-detection

* support mips64/mips64el in stdsimd-test

* support asserting instructions with  in their name

* better error msgs for the auxv_crate test

* debug auxv on mips64

* override run-time detection on mips msa tests

* remove unused #[macro_use]

* try another MIPS cpu

* detect default TARGET in simd-test-macro

* use mips64r2-generic

* disable unused function in mips tests

* move msa to mips

* remove mips from ci

* split into mips and mips64 modules

* add rt-detection for 32-bit mips

* fmt

* remove merge error

* add norun build bots for mips

* add -p to avoid changing the cwd

* fixup

* refactor run-time detection module
2018-03-10 12:22:54 -06:00
QuietMisdreavus
63b540b07a rustfmt 2018-03-10 00:04:01 +01:00
QuietMisdreavus
ef0d02d04b document all arches when part of std
unfortunately, stdsimd's version of the documentation will be blanked
out in favor of coresimd's version, but coresimd (when re-exported in
libcore) will include all the arches
2018-03-10 00:04:01 +01:00
Alex Crichton
cb4a957efd Add initial wasm memory grow/current intrinsics (#361)
This exposes access to the `grow_memory` and `current_memory` instructions
provided by wasm in what will hopefully be a stable interface (the stable part
being x86 first in theory).
2018-03-09 09:21:08 -06:00
Jake Goulding
2b1ee5288f Fix unsigned typo (#359) 2018-03-08 10:29:09 -06:00
Jake Goulding
1f96ac2d53 Typos in cmpistr* functions (#357) 2018-03-08 09:53:44 -06:00
Jake Goulding
77f9754f15 Subtract typo 2018-03-08 16:18:49 +01:00
gnzlbg
afca7f8d16 Migrate to rustfmt-preview and require rustfmt builds to pass (#353)
* migrate to rustfmt-preview and require rustfmt to pass

* reformat with rustfmt-preview
2018-03-08 09:09:24 -06:00
gnzlbg
26fd3bb5a9 better error messages for target-feature detection macros (#352)
Better error messages for target-feature detection macros
2018-03-08 09:59:21 +01:00
Alex Crichton
d7b42faaa3 Add cfg! clauses to detection macro (#351)
This way if the feature is statically detected then it'll be expanded to `true`

Closes #349
2018-03-07 10:28:12 -06:00
Alex Crichton
56af498e9e Rename is_target_feature_detected! (#346)
This commit renames the `is_target_feature_detected!` macro to have different
names depending on the platform. For example:

* `is_x86_feature_detected!`
* `is_arm_feature_detected!`
* `is_aarch64_feature_detected!`
* `is_powerpc64_feature_detected!`

Each macro already has a platform-specific albeit similar interface. Currently,
though, each macro takes a different set of strings so the hope is that like
with the name of the architecture in the module we can signal the dangers of
using the macro in a platform-agnostic context.

One liberty taken with the macro currently though is to on both the x86 and
x86_64 architectures name the macro `is_x86_feature_detected` rather than also
having an `is_x86_64_feature_detected`. This mirrors, however, how all the
intrinsics are named the same on x86/x86_64.
2018-03-07 09:46:16 -06:00
gnzlbg
be0b7f41fc adds AArch64's {s,u,f}{min,max}{v,p} and ARM's {vmov}{n,l} (#345)
* adds {s,u,f}{min,max}{v,p} AArch64 intrinsics
* adds {vmov}{n,l} ARM intrinsics

Closes #314 .
2018-03-07 09:31:14 -06:00
gnzlbg
237ec908f1 remove unnecessary println statements (#343) 2018-03-06 11:51:28 -06:00
gnzlbg
548290b801 Prepare portable packed vector types for RFCs (#338)
* Prepare portable packed SIMD vector types for RFCs

This commit cleans up the implementation of the Portable Packed Vector Types
(PPTV), adds some new features, and makes some breaking changes.

The implementation is moved to `coresimd/src/ppvt` (they are
still exposed via `coresimd::simd`).

As before, the vector types of a certain width are implemented in the `v{width}`
submodules. The `macros.rs` file has been rewritten as an `api` module that
exposes the macros to implement each API.

It should now hopefully be really clear where each API is implemented, and which types
implement these APIs. It should also now be really clear which APIs are tested and how.

- boolean vectors of the form `b{element_size}x{number_of_lanes}`.
- reductions: arithmetic, bitwise, min/max, and boolean - only the facade,
  and a naive working implementation. These need to be implemented
  as `llvm.experimental.vector.reduction.{...}` but this needs rustc support first.
- FromBits trait analogous to `{f32,f64}::from_bits` that perform "safe" transmutes.
  Instead of writing `From::from`/`x.into()` (see below for breaking changes) now you write
  `FromBits::from_bits`/`x.into_bits()`.
- portable vector types implement `Default` and `Hash`
- tests for all portable vector types and all portable operations (~2000 new tests).
- (hopefully) comprehensive implementation of bitwise transmutes and lane-wise
  casts (before `From` and the `.as_...` methods where implemented "when they were needed".
- documentation for PPTV (not great yet, but better than nothing)
- conversions/transmutes from/to x86 architecture specific vector types

- `store/load` API has been replaced with `{store,load}_{aligned,unaligned}`
- `eq,ne,lt,le,gt,ge` APIs now return boolean vectors
- The `.as_{...}` methods have been removed. Lane-wise casts are now performed by `From`.
- `From` now perform casts (see above). It used to perform bitwise transmutes.
- `simd` vectors' `replace` method's result is now `#[must_use]`.

* enable backtrace and nocapture

* unalign load/store fail test by 1 byte

* update arm and aarch64 neon modules

* fix arm example

* fmt

* clippy and read example that rustfmt swallowed

* reductions should take self

* rename add/mul -> sum/product; delete other arith reductions

* clean up fmt::LowerHex impl

* revert incorret doc change

* make Hash equivalent to [T; lanes()]

* use travis_wait to increase timeout limit to 20 minutes

* remove travis_wait; did not help

* implement reductions on top of the llvm.experimental.vector.reduction intrinsics

* implement cmp for boolean vectors

* add missing eq impl file

* implement default

* rename llvm intrinsics

* fix aarch64 example error

* replace #[inline(always)] with #[inline]

* remove cargo clean from run.sh

* workaround broken product in aarch64

* make boolean vector constructors const fn

* fix more reductions on aarch64

* fix min/max reductions on aarch64

* remove whitespace

* remove all boolean vector types except for b8xN

* use a sum reduction fallback on aarch64

* disable llvm add reduction for aarch64

* rename the llvm intrinsics to use llvm names

* remove old macros.rs file
2018-03-05 14:32:35 -06:00
Vincent Esche
4e74e2e4e2 Fixed typo in docs header 2018-03-05 10:02:42 +01:00
gnzlbg
f1d8a88267 Run-time feature detection for new AArch64 features (#339)
* aarch64 run-time feature detection for latest whitelisted features

* dump new aarch64 features in the run-time detection tests

* add some comments

* remove old code
2018-03-02 21:27:55 -06:00
Alex Crichton
708cc9d9b8 Rename bmi to bmi1
In accordance with rust-lang/rust#48565
2018-03-02 07:02:22 -08:00
Alex Crichton
a6eefb6e29 Remove some dead links 2018-02-27 12:49:48 -08:00
Alex Crichton
87566b578b Another minor fix for libstd tests 2018-02-27 12:47:24 -08:00
Alex Crichton
94d8a193c4 Tweak doctests to pass in libstd as well (#335)
The boilerplate just gets more and more ugly...
2018-02-27 13:13:22 -06:00
Alex Crichton
217f89bc4f Reorganize the x86/x86_64 intrinsic folders (#334)
The public API isn't changing in this commit but the internal organization is
being rejiggered. Instead of `x86/$subtarget/$feature.rs` the folders are
changed to `coresimd/x86/$feature.rs` and `coresimd/x86_64/$feature.rs`. The
`arch::x86_64` then reexports both the contents of the `x86` module and the
`x86_64` module.
2018-02-27 08:41:07 -06:00
Artyom Pavlov
aa4cef7723 Implemented rdrand and rdseed intrinsics (#326)
* implemented rdrand and rdseed intrinsics

* added "unsigned short*" case

* moved rdrand from i686 to x86_64

* 64 bit rdrand functions in x86_64, 16 and 32 in i686
2018-02-27 07:58:08 -06:00
Alex Crichton
5636900b03 Reimplement _xgetbv with inline assembly (#333)
Looks like LLVM 6 may have removed the intrinsic, and this implementation is
modeled after clang's.
2018-02-27 07:52:10 -06:00
Alex Crichton
560fe20b61 Beef up documentation of arch module (#331)
This commit reorganizes some documentation for inclusion into the standard
library, moving the bulk of the docs to the `arch` module and away from the
crate root which won't actually be the end-user interface.
2018-02-27 07:24:59 -06:00
Alex Crichton
3579853e20 Fix the implementation of _mm256_alignr_epi8 (#330)
This seems likely to have mostly just been a copy/paste error, so this
re-reviews the intrinsics and aligns it with the implementation in
clang.

Closes #328
2018-02-25 12:37:15 -06:00
Alex Crichton
746ab07521 Compile examples on CI (#329)
Make sure the top-level `examples` folder is registered with the
`stdsimd` crate!
2018-02-25 12:37:08 -06:00
Alex Crichton
db5648e0e4 Start adding stability attributes (#327)
To integrate into the standard library this crate needs *at least* a
stability attribute on the macro itself but this commit also beings by
adding unstable attributes to the exported modules as well. This should
help everything be unstable-by-default and we can start iterating from
there in the standard library.

This commit also does away with the `coresimd::vendor` module internal
implementation detail, instead directly creating the `arch` module to
allow easily documenting it in this crate and having the docs show up in
rust-lang/rust.
2018-02-24 14:11:09 +09:00
Artyom Pavlov
145c52dbf9 CLMUL instruction set (#320)
* added pclmul

* added docs

* pclmul -> pclmulqdq

* imm8: u8 -> imm8: i32

* return changes to stdsimd/arch/detect/x86.rs

* error fixes

* added rustc_args_required_const

* fixed assert_instr for _mm_clmulepi64_si128

* fixed pclmul assert_instr tests
2018-02-18 15:55:57 +09:00
Alex Crichton
39b5ec91ae Reorganize and refactor source tree (#324)
With RFC 2325 looking close to being accepted, I took a crack at
reorganizing this repository to being more amenable for inclusion in
libstd/libcore. My current plan is to add stdsimd as a submodule in
rust-lang/rust and then use `#[path]` to include the modules directly
into libstd/libcore.

Before this commit, however, the source code of coresimd/stdsimd
themselves were not quite ready for this. Imports wouldn't compile for
one reason or another, and the organization was also different than the
RFC itself!

In addition to moving a lot of files around, this commit has the
following major changes:

* The `cfg_feature_enabled!` macro is now renamed to
  `is_target_feature_detected!`
* The `vendor` module is now called `arch`.
* Under the `arch` module is a suite of modules like `x86`, `x86_64`,
  etc. One per `cfg!(target_arch)`.
* The `is_target_feature_detected!` macro was removed from coresimd.
  Unfortunately libcore has no ability to export unstable macros, so for
  now all feature detection is canonicalized in stdsimd.

The `coresimd` and `stdsimd` crates have been updated to the planned
organization in RFC 2325 as well. The runtime bits saw the largest
amount of refactoring, seeing a good deal of simplification without the
core/std split.
2018-02-18 10:07:35 +09:00
Alex Crichton
d097221faf Add #[rustc_args_required_const] annotations (#319)
Support isn't quite in nightly to make this work yet, but using a local build
this gets everything passing again! This also implements native verification
that we have the attribute in the right place
2018-02-11 10:24:33 -06:00
Alex Crichton
354e96ba1b Fix instruction assertions on LLVM 6 (#321)
Looks like some instructions changed here and there, so this updates the
assertions (no behavior appears to have changed though)
2018-02-11 10:04:53 -06:00
Ruud van Asseldonk
ee249f766c Add x86 AES-NI vendor intrinsics (#311)
* Define _mm_aes*_si128 intrinsics

* Add tests for _mm_aes*_si128 intrinsics

These tests are based on the examples in Microsoft's documentation.
Same input should result in the same output in any case.

* Constify imm8 argument of aeskeygenassist

* Do not rely on internal layout of __m128

Use _mm_set_epi64x instead to construct constants.

* Move AES vendor intrinsics from x86_64 to i686

Although i686 does not have the AES New Instructions, making code
compatible across x86 and x64_64 tends to be easier if the intrinsics
are available everywhere.

* Pass constant for assert_instr(aeskeygenassist)

Pass a particular value for the disassembly test, so we end up with one
instruction, instead of the match arm that matches on all 256 values.

* Make aeskeygenassist imm8 argument i32, not u8

Intel documentation specifies it as an "8-bit round constant", but then
goes on to give it a type "const int", which translates to i32 in Rust.
The test that verifies the Rust signatures against Intel documentation
failed on this.

For now we will replicate the C API verbatim. Even when Rust could have
a more accurate type signature that makes passing values more than 8
bits impossible, rather than silently mapping out-of-range values to
255.

* Reflow doc comment as proposed by rustfmt

* Add module doc comment for i686::aes
2018-02-05 11:07:40 -06:00
Alex Crichton
be41ce3369 Remove known exceptions to Intel's signatures (#317)
We had a few lingering intrinsics which were getting some special
treatment for having different types than what Intel specified. This
commit removes all these cases and reverts to precisely what upstream
Intel mentions (even if it doesn't make the most sense in some cases)
2018-02-05 10:04:46 -06:00
Andre Bogus
8b676746f1 remove spurious newline 2018-02-05 10:28:55 +01:00
Andre Bogus
dc650c9c8e move bswap and tsc to i386
This fixes #313
2018-02-05 10:28:55 +01:00
gnzlbg
4d545e713f Run-time feature detection for AES-NI and TSC (#312)
* add runtime detection for aes-ni

* fmtting and fixing some clippy issues

* add runtime-feature detection for tsc

* fix remaining clippy issues

* manually fix some formatting issues

* increase feature cache size

* use 2x AtomicU32 on 32-bit targets as the feature cache

* use the new cache in stdsimd
2018-02-02 09:08:27 -06:00
Alex Crichton
dc587cc46c Comment that the rdtsc intrinsics should be ok
Some more info should be in #308, and otherwise ...

Closes #308
2018-01-29 08:36:10 -08:00
Alex Crichton
0e57eefffe Note that some intrinsics are manually verified
Closes #307
2018-01-29 08:32:13 -08:00
Alex Crichton
d1acec0b39 Refactor the x86 verify implementation
* Support instructions defined multiple times in the XML (just match one of
  them)
* Support AVX-512 in more locations
* Add support for printing lists of missing intrinsics
* Add a few constants to hopefully tweak the program easily
2018-01-29 08:27:46 -08:00