* fix _mm_castsi128_pd and _mm_castpd_si128 impls
The _mm_castX_Y SSE intrinsics are "reinterpreting" casts; LLVM's
simd_cast is a "converting" cast. Replace simd_cast with mem::transmute.
Fixes#55249
* Temporarily pin CI
* Fix i686 segfaults
* Fix wasm CI
Output of `wasm2wat` has changed!
* Fix AppVeyor with an older nightly
The official name of the memory intrinsics has changed to `memory.size` and
`memory.grow`, so let's reflect that with our naming as well! Additionally they
have an argument of which memory to operate on with LLVM and must always be zero
currently.
Currently these are gated by the `atomics` feature unconditionally, but that may
be tweaked in the future! Otherwise this should enable building out some
primitives in the standard library using these intrinsics.
* Add wasm32 simd128 intrinsics
* test wasm32 simd128 instructions
* Run wasm tests like all other tests
* use modules instead of types to access wasm simd128 interpretations
* generate docs for wasm32-unknown-unknown
* fix typo
* Enable #[assert_instr] on wasm32
* Shell out to Node's `execSync` to execute `wasm2wat` over our wasm file
* Parse the wasm file line-by-line, looking for various function markers and
such
* Use the `elem` section to build a function pointer table, allowing us to map
exactly from function pointer to a function
* Avoid losing debug info (the names section) in release mode by stripping
`--strip-debug` from `rust-lld`.
* remove exclude list from Cargo.toml
* fix assert_instr for non-wasm targets
* re-format assert-instr changes
* add crate that uses assert_instr
* Fix instructions having extra quotes
* Add assert_instr for wasm memory intrinsics
* Remove hacks for git wasm-bindgen
* add wasm_simd128 feature
* make wasm32 build correctly
* run simd128 tests on ci
* remove wasm-assert-instr-tests
Add support for `smlad` and `smlsd`.
- `smlad`: Dual 16-bit Signed Multiply with Addition and
32-bit accumulation
- `smlsd`: Dual 16-bit Signed Multiply with Subtraction and
32-bit accumulation
* ARM DSP: Add signed halving parallel sub.
Add:
- `shsub8`: Signed halving parallel byte-wise subtraction.
- `shsub16`: Signed halving parallel halfword-wise subtraction.
* ARM DSP: Signed halving parallel additions.
- `shadd8`: Signed halving parallel byte-wise add.
- `shadd16`: Signed halving parallel halfword-wise add.
* ARM DSP: Signed Dual Multiply Add and Signed Dual Multiply Sub.
- `SMUAD`: Signed Dual Multiply Add.
- `SMUADX`: Signed Dual Multiply Add Reversed.
- `SMUSD`: Signed Dual Multiply Subtract.
- `SMUSDX`: Signed Dual Multiply Subtract Reversed.
* ARM DSP: Restrict to Cortex-A and Cortex-R
Restrict everything to Cortex-A/R till We found a better way manage
thumb* targets.
Add 'dox' to generate docs.
* ARM DSP: fix Markdown documentation
Quote '[' and ']' where are not part of the Markdown syntax.
- Quad 8-bit addition/subtraction
- Double 8-bit addition/subtraction
- Saturating Add and Subtract with Exchange and
Saturating Subtract and Add with Exchange, signed
- Select bytes based on GE bits
This patch bump the `assert_instr` limit to 22 (from 20) instead of
add a lots of exception for all DSP intrinsics.
* Add few ARM DSP Intrinsics
- Signed saturating add/sub
- Saturating four 8-bit integer add/sub
- Saturating two 8-bit integer add/sub
The intent is mainly to setup the module and to add all
the rest in the future.
Listed intrinsics are available on Cortex-M too (+dsp is required
on some model except for M4).
* Arm DSP: rebase and remove portable vector types
Rebase everything on top of master since the portable vector types
have been removed.
