4 Commits

Author SHA1 Message Date
Paul Murphy
4945d21ed9 Implement ppc/ppc64 preserves_flags option for inline asm
Implemented preserves_flags on powerpc by making it do
nothing. This prevents having two different ways to mark
`cr0` as clobbered. clang and gcc alias `cr0` to `cc`.

The gcc inline documentation does not state what this does
on powerpc* targets, but inspection of the source shows
it is equivalent to condition register field `cr0`, so it
should not be added.
2025-10-14 10:05:07 -05:00
Paul Murphy
3c09d4a582 Allow vector-scalar (vs) registers in ppc inline assembly
Where supported, VSX is a 64x128b register set which encompasses
both the floating point and vector registers.

In the type tests, xvsqrtdp is used as it is the only two-argument
vsx opcode supported by all targets on llvm. If you need to copy
a vsx register, the preferred way is "xxlor xt, xa, xa".
2025-10-14 09:52:56 -05:00
Taiki Endo
f4b876867d Support ctr and lr as clobber-only registers in PowerPC inline assembly 2025-09-21 13:48:22 +09:00
Guillaume Gomez
a27f3e3fd1 Rename tests/codegen into tests/codegen-llvm 2025-07-22 14:28:48 +02:00