some clippy fixes

library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs

@@ -7925,7 +7925,7 @@ pub fn vcvth_f16_u64(a: u64) -> f16 {
 #[unstable(feature = "stdarch_neon_f16", issue = "136306")]
 pub fn vcvth_n_f16_s16<const N: i32>(a: i16) -> f16 {
     static_assert!(N >= 1 && N <= 16);
-    vcvth_n_f16_s32::<N>(a as i32) as f16
+    vcvth_n_f16_s32::<N>(a as i32)
 }
 #[doc = "Fixed-point convert to floating-point"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvth_n_f16_s32)"]
@@ -7972,7 +7972,7 @@ pub fn vcvth_n_f16_s64<const N: i32>(a: i64) -> f16 {
 #[unstable(feature = "stdarch_neon_f16", issue = "136306")]
 pub fn vcvth_n_f16_u16<const N: i32>(a: u16) -> f16 {
     static_assert!(N >= 1 && N <= 16);
-    vcvth_n_f16_u32::<N>(a as u32) as f16
+    vcvth_n_f16_u32::<N>(a as u32)
 }
 #[doc = "Fixed-point convert to floating-point"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvth_n_f16_u32)"]
@@ -24082,7 +24082,6 @@ pub fn vrsqrtes_f32(a: f32) -> f32 {
 #[doc = "Reciprocal square-root estimate."]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsqrteh_f16)"]
 #[inline]
-#[target_feature(enable = "neon,fp16")]
 #[cfg_attr(test, assert_instr(frsqrte))]
 #[target_feature(enable = "neon,fp16")]
 #[unstable(feature = "stdarch_neon_f16", issue = "136306")]

library/stdarch/crates/core_arch/src/arm_shared/mod.rs

@@ -20,10 +20,10 @@
 //! Section 10.1 of ACLE says:
 //!
 //! - "In the sequence of Arm architectures { v5, v5TE, v6, v6T2, v7 } each architecture includes
-//! its predecessor instruction set."
+//!   its predecessor's instruction set."
 //!
 //! - "In the sequence of Thumb-only architectures { v6-M, v7-M, v7E-M } each architecture includes
-//! its predecessor instruction set."
+//!   its predecessor's instruction set."
 //!
 //! From that info and from looking at how LLVM features work (using custom targets) we can identify
 //! features that are subsets of others:
@@ -38,7 +38,7 @@
 //! *NOTE*: Section 5.4.7 of ACLE says:
 //!
 //! - "__ARM_FEATURE_DSP is defined to 1 if the DSP (v5E) instructions are supported and the
-//! intrinsics defined in Saturating intrinsics are available."
+//!   intrinsics defined in Saturating intrinsics are available."
 //!
 //! This does *not* match how LLVM uses the '+dsp' feature; this feature is not set for v5te
 //! targets so we have to work around this difference.

library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs

@@ -777,8 +777,8 @@ pub struct float16x8x2_t(pub float16x8_t, pub float16x8_t);
 #[repr(C)]
 #[derive(Copy, Clone, Debug)]
 #[unstable(feature = "stdarch_neon_f16", issue = "136306")]
-
 pub struct float16x8x3_t(pub float16x8_t, pub float16x8_t, pub float16x8_t);
+
 /// Arm-specific type containing four `float16x8_t` vectors.
 #[repr(C)]
 #[derive(Copy, Clone, Debug)]

library/stdarch/crates/intrinsic-test/src/common/compare.rs

@@ -48,7 +48,7 @@ pub fn compare_outputs(
                 return Some(FailureReason::RunRust(intrinsic_name.clone()));
             }
 
-            info!("Comparing intrinsic: {}", intrinsic_name);
+            info!("Comparing intrinsic: {intrinsic_name}");
 
             let c = std::str::from_utf8(&c.stdout)
                 .unwrap()

library/stdarch/crates/intrinsic-test/src/common/gen_c.rs

@@ -79,7 +79,7 @@ pub fn compile_c_programs(compiler_commands: &[String]) -> bool {
                     false
                 }
             } else {
-                error!("Command failed: {:#?}", output);
+                error!("Command failed: {output:#?}");
                 false
             }
         })

library/stdarch/crates/intrinsic-test/src/common/gen_rust.rs

@@ -120,7 +120,7 @@ path = "{binary}/main.rs""#,
             false
         }
     } else {
-        error!("Command failed: {:#?}", output);
+        error!("Command failed: {output:#?}");
         false
     }
 }

library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml

@@ -1252,7 +1252,7 @@ intrinsics:
       - [i16, f16, 'h', 'i32', 'as i32']
     compose:
       - FnCall: [static_assert!, ['N >= 1 && N <= 16']]
-      - "vcvt{type[2]}_n_{type[1]}_{type[3]}::<N>(a {type[4]}) as {type[1]}"
+      - "vcvt{type[2]}_n_{type[1]}_{type[3]}::<N>(a {type[4]})"
 
 
   - name: "vcvt{type[2]}_n_{type[1]}_{type[0]}"
@@ -1270,7 +1270,7 @@ intrinsics:
       - [u16, f16, 'h', u32]
     compose:
       - FnCall: [static_assert!, ['N >= 1 && N <= 16']]
-      - "vcvt{type[2]}_n_{type[1]}_{type[3]}::<N>(a as {type[3]}) as {type[1]}"
+      - "vcvt{type[2]}_n_{type[1]}_{type[3]}::<N>(a as {type[3]})"
 
 
   - name: "vcvt{type[2]}"
@@ -11697,7 +11697,6 @@ intrinsics:
     arguments: ["a: {type[1]}"]
     return_type: "{type[1]}"
     attr:
-      - *neon-fp16
       - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [frsqrte]]}]]
       - *neon-fp16
       - *neon-unstable-f16