convert _mm512_srai_epi16 to const generics
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committed by
Amanieu d'Antras
parent
dabaca41ca
commit
fda297656b
@@ -5641,16 +5641,12 @@ pub unsafe fn _mm_maskz_sra_epi16(k: __mmask8, a: __m128i, count: __m128i) -> __
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_srai_epi16&expand=5427)
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_srai_epi16&expand=5427)
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#[inline]
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#[inline]
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#[target_feature(enable = "avx512bw")]
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#[target_feature(enable = "avx512bw")]
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#[cfg_attr(test, assert_instr(vpsraw, imm8 = 1))]
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#[cfg_attr(test, assert_instr(vpsraw, IMM8 = 1))]
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#[rustc_args_required_const(1)]
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#[rustc_legacy_const_generics(1)]
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pub unsafe fn _mm512_srai_epi16(a: __m512i, imm8: u32) -> __m512i {
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pub unsafe fn _mm512_srai_epi16<const IMM8: u32>(a: __m512i) -> __m512i {
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static_assert_imm_u8!(IMM8);
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let a = a.as_i16x32();
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let a = a.as_i16x32();
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macro_rules! call {
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let r = vpsraiw(a, IMM8);
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($imm8:expr) => {
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vpsraiw(a, $imm8)
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};
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}
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let r = constify_imm8_sae!(imm8, call);
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transmute(r)
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transmute(r)
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}
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}
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@@ -14924,7 +14920,7 @@ mod tests {
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#[simd_test(enable = "avx512bw")]
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#[simd_test(enable = "avx512bw")]
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unsafe fn test_mm512_srai_epi16() {
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unsafe fn test_mm512_srai_epi16() {
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let a = _mm512_set1_epi16(8);
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let a = _mm512_set1_epi16(8);
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let r = _mm512_srai_epi16(a, 2);
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let r = _mm512_srai_epi16::<2>(a);
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let e = _mm512_set1_epi16(2);
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let e = _mm512_set1_epi16(2);
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assert_eq_m512i(r, e);
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assert_eq_m512i(r, e);
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}
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}
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