Merge commit '35d9c6bf256968e1b40e0d554607928bdf9cebea' into sync_cg_clif-2022-02-23
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@@ -8,14 +8,14 @@ use rustc_middle::ty::subst::SubstsRef;
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pub(crate) fn codegen_llvm_intrinsic_call<'tcx>(
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fx: &mut FunctionCx<'_, '_, 'tcx>,
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intrinsic: &str,
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substs: SubstsRef<'tcx>,
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_substs: SubstsRef<'tcx>,
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args: &[mir::Operand<'tcx>],
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destination: Option<(CPlace<'tcx>, BasicBlock)>,
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) {
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let ret = destination.unwrap().0;
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intrinsic_match! {
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fx, intrinsic, substs, args,
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fx, intrinsic, args,
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_ => {
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fx.tcx.sess.warn(&format!("unsupported llvm intrinsic {}; replacing with trap", intrinsic));
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crate::trap::trap_unimplemented(fx, intrinsic);
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@@ -52,8 +52,8 @@ pub(crate) fn codegen_llvm_intrinsic_call<'tcx>(
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ret.write_cvalue(fx, res);
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};
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"llvm.x86.sse2.cmp.ps" | "llvm.x86.sse2.cmp.pd", (c x, c y, o kind) {
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let kind_const = crate::constant::mir_operand_get_const_val(fx, kind).expect("llvm.x86.sse2.cmp.* kind not const");
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let flt_cc = match kind_const.try_to_bits(Size::from_bytes(1)).unwrap_or_else(|| panic!("kind not scalar: {:?}", kind_const)) {
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let kind = crate::constant::mir_operand_get_const_val(fx, kind).expect("llvm.x86.sse2.cmp.* kind not const");
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let flt_cc = match kind.try_to_bits(Size::from_bytes(1)).unwrap_or_else(|| panic!("kind not scalar: {:?}", kind)) {
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0 => FloatCC::Equal,
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1 => FloatCC::LessThan,
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2 => FloatCC::LessThanOrEqual,
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@@ -73,32 +73,30 @@ pub(crate) fn codegen_llvm_intrinsic_call<'tcx>(
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kind => unreachable!("kind {:?}", kind),
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};
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simd_pair_for_each_lane(fx, x, y, ret, |fx, lane_layout, res_lane_layout, x_lane, y_lane| {
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let res_lane = match lane_layout.ty.kind() {
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simd_pair_for_each_lane(fx, x, y, ret, &|fx, lane_ty, res_lane_ty, x_lane, y_lane| {
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let res_lane = match lane_ty.kind() {
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ty::Float(_) => fx.bcx.ins().fcmp(flt_cc, x_lane, y_lane),
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_ => unreachable!("{:?}", lane_layout.ty),
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_ => unreachable!("{:?}", lane_ty),
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};
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bool_to_zero_or_max_uint(fx, res_lane_layout, res_lane)
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bool_to_zero_or_max_uint(fx, res_lane_ty, res_lane)
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});
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};
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"llvm.x86.sse2.psrli.d", (c a, o imm8) {
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let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8).expect("llvm.x86.sse2.psrli.d imm8 not const");
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simd_for_each_lane(fx, a, ret, |fx, _lane_layout, res_lane_layout, lane| {
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let res_lane = match imm8.try_to_bits(Size::from_bytes(4)).unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8)) {
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simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| {
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match imm8.try_to_bits(Size::from_bytes(4)).unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8)) {
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imm8 if imm8 < 32 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
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_ => fx.bcx.ins().iconst(types::I32, 0),
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};
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CValue::by_val(res_lane, res_lane_layout)
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}
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});
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};
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"llvm.x86.sse2.pslli.d", (c a, o imm8) {
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let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8).expect("llvm.x86.sse2.psrli.d imm8 not const");
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simd_for_each_lane(fx, a, ret, |fx, _lane_layout, res_lane_layout, lane| {
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let res_lane = match imm8.try_to_bits(Size::from_bytes(4)).unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8)) {
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simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| {
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match imm8.try_to_bits(Size::from_bytes(4)).unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8)) {
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imm8 if imm8 < 32 => fx.bcx.ins().ishl_imm(lane, i64::from(imm8 as u8)),
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_ => fx.bcx.ins().iconst(types::I32, 0),
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};
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CValue::by_val(res_lane, res_lane_layout)
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}
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});
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};
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"llvm.x86.sse2.storeu.dq", (v mem_addr, c a) {
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