add arm/aarch64 table lookup and vector combine intrinsics (#546)

This commit is contained in:
gnzlbg
2018-08-01 15:59:31 +02:00
committed by Alex Crichton
parent 82274aadc1
commit e6370ca22a
4 changed files with 2507 additions and 3 deletions

View File

@@ -94,8 +94,7 @@ pub fn assert_instr(
.ident
.to_string()
.starts_with("target")
})
.collect::<Vec<_>>();
}).collect::<Vec<_>>();
let attrs = Append(&attrs);
// Use an ABI on Windows that passes SIMD values in registers, like what