Merge commit 'db1a31c243a649e1fe20f5466ba181da5be35c14' into subtree-update_cg_gcc_2025-04-18
This commit is contained in:
@@ -36,7 +36,8 @@ use crate::type_of::LayoutGccExt;
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//
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// 3. Clobbers. GCC has a separate list of clobbers, and clobbers don't have indexes.
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// Contrary, Rust expresses clobbers through "out" operands that aren't tied to
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// a variable (`_`), and such "clobbers" do have index.
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// a variable (`_`), and such "clobbers" do have index. Input operands cannot also
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// be clobbered.
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//
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// 4. Furthermore, GCC Extended Asm does not support explicit register constraints
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// (like `out("eax")`) directly, offering so-called "local register variables"
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@@ -161,6 +162,16 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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// Also, we don't emit any asm operands immediately; we save them to
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// the one of the buffers to be emitted later.
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let mut input_registers = vec![];
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for op in rust_operands {
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if let InlineAsmOperandRef::In { reg, .. } = *op {
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if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
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input_registers.push(reg_name);
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}
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}
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}
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// 1. Normal variables (and saving operands to buffers).
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for (rust_idx, op) in rust_operands.iter().enumerate() {
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match *op {
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@@ -183,25 +194,39 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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continue;
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}
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(Register(reg_name), None) => {
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// `clobber_abi` can add lots of clobbers that are not supported by the target,
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// such as AVX-512 registers, so we just ignore unsupported registers
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let is_target_supported =
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reg.reg_class().supported_types(asm_arch, true).iter().any(
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|&(_, feature)| {
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if let Some(feature) = feature {
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self.tcx
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.asm_target_features(instance.def_id())
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.contains(&feature)
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} else {
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true // Register class is unconditionally supported
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}
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},
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);
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if input_registers.contains(®_name) {
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// the `clobber_abi` operand is converted into a series of
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// `lateout("reg") _` operands. Of course, a user could also
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// explicitly define such an output operand.
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//
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// GCC does not allow input registers to be clobbered, so if this out register
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// is also used as an in register, do not add it to the clobbers list.
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// it will be treated as a lateout register with `out_place: None`
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if !late {
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bug!("input registers can only be used as lateout regisers");
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}
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("r", dummy_output_type(self.cx, reg.reg_class()))
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} else {
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// `clobber_abi` can add lots of clobbers that are not supported by the target,
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// such as AVX-512 registers, so we just ignore unsupported registers
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let is_target_supported =
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reg.reg_class().supported_types(asm_arch, true).iter().any(
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|&(_, feature)| {
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if let Some(feature) = feature {
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self.tcx
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.asm_target_features(instance.def_id())
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.contains(&feature)
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} else {
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true // Register class is unconditionally supported
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}
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},
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);
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if is_target_supported && !clobbers.contains(®_name) {
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clobbers.push(reg_name);
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if is_target_supported && !clobbers.contains(®_name) {
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clobbers.push(reg_name);
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}
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continue;
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}
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continue;
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}
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};
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@@ -230,13 +255,10 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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}
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InlineAsmOperandRef::InOut { reg, late, in_value, out_place } => {
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let constraint =
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if let ConstraintOrRegister::Constraint(constraint) = reg_to_gcc(reg) {
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constraint
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} else {
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// left for the next pass
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continue;
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};
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let ConstraintOrRegister::Constraint(constraint) = reg_to_gcc(reg) else {
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// left for the next pass
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continue;
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};
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// Rustc frontend guarantees that input and output types are "compatible",
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// so we can just use input var's type for the output variable.
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@@ -589,114 +611,127 @@ fn estimate_template_length(
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}
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/// Converts a register class to a GCC constraint code.
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fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
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let constraint = match reg {
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// For vector registers LLVM wants the register name to match the type size.
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fn reg_to_gcc(reg_or_reg_class: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
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match reg_or_reg_class {
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InlineAsmRegOrRegClass::Reg(reg) => {
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match reg {
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InlineAsmReg::X86(_) => {
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// TODO(antoyo): add support for vector register.
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//
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// // For explicit registers, we have to create a register variable: https://stackoverflow.com/a/31774784/389119
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return ConstraintOrRegister::Register(match reg.name() {
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// Some of registers' names does not map 1-1 from rust to gcc
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"st(0)" => "st",
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ConstraintOrRegister::Register(explicit_reg_to_gcc(reg))
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}
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InlineAsmRegOrRegClass::RegClass(reg_class) => {
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ConstraintOrRegister::Constraint(reg_class_to_gcc(reg_class))
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}
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}
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}
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name => name,
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});
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fn explicit_reg_to_gcc(reg: InlineAsmReg) -> &'static str {
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// For explicit registers, we have to create a register variable: https://stackoverflow.com/a/31774784/389119
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match reg {
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InlineAsmReg::X86(reg) => {
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// TODO(antoyo): add support for vector register.
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match reg.reg_class() {
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X86InlineAsmRegClass::reg_byte => {
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// GCC does not support the `b` suffix, so we just strip it
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// see https://github.com/rust-lang/rustc_codegen_gcc/issues/485
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reg.name().trim_end_matches('b')
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}
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_ => match reg.name() {
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// Some of registers' names does not map 1-1 from rust to gcc
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"st(0)" => "st",
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_ => unimplemented!(),
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name => name,
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},
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}
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}
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// They can be retrieved from https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
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InlineAsmRegOrRegClass::RegClass(reg) => match reg {
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => "w",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => "x",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => "t",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => "d",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => "r",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => "w",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
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InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
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InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d",
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InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "d", // more specific than "r"
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
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// https://github.com/gcc-mirror/gcc/blob/master/gcc/config/nvptx/nvptx.md -> look for
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// "define_constraint".
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => "h",
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => "r",
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => "l",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => "v",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
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| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => "Q",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => "q",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg)
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "Yk",
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::kreg0
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| X86InlineAsmRegClass::x87_reg
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| X86InlineAsmRegClass::mmx_reg
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| X86InlineAsmRegClass::tmm_reg,
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) => unreachable!("clobber-only"),
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("GCC backend does not support SPIR-V")
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}
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InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg_addr) => "a",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::vreg) => "v",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::areg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Sparc(SparcInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Sparc(SparcInlineAsmRegClass::yreg) => unreachable!("clobber-only"),
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InlineAsmRegClass::Err => unreachable!(),
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},
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};
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_ => unimplemented!(),
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}
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}
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ConstraintOrRegister::Constraint(constraint)
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/// They can be retrieved from https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
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fn reg_class_to_gcc(reg_class: InlineAsmRegClass) -> &'static str {
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match reg_class {
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => "w",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => "x",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => "t",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => "d",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => "r",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => "w",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
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InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
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InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d",
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InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "d", // more specific than "r"
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
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// https://github.com/gcc-mirror/gcc/blob/master/gcc/config/nvptx/nvptx.md -> look for
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// "define_constraint".
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => "h",
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => "r",
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => "l",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => "v",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
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| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => "Q",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => "q",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg)
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "Yk",
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::kreg0
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| X86InlineAsmRegClass::x87_reg
|
||||
| X86InlineAsmRegClass::mmx_reg
|
||||
| X86InlineAsmRegClass::tmm_reg,
|
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) => unreachable!("clobber-only"),
|
||||
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("GCC backend does not support SPIR-V")
|
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}
|
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InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
|
||||
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
|
||||
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg_addr) => "a",
|
||||
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
|
||||
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::vreg) => "v",
|
||||
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::areg) => {
|
||||
unreachable!("clobber-only")
|
||||
}
|
||||
InlineAsmRegClass::Sparc(SparcInlineAsmRegClass::reg) => "r",
|
||||
InlineAsmRegClass::Sparc(SparcInlineAsmRegClass::yreg) => unreachable!("clobber-only"),
|
||||
InlineAsmRegClass::Err => unreachable!(),
|
||||
}
|
||||
}
|
||||
|
||||
/// Type to use for outputs that are discarded. It doesn't really matter what
|
||||
|
||||
Reference in New Issue
Block a user