remove 128bit atomics, they are anyway not exposed on those targets
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@@ -103,8 +103,7 @@
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//! | `target_arch` | Size limit |
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//! | `target_arch` | Size limit |
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//! |---------------|---------|
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//! |---------------|---------|
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//! | `x86`, `arm`, `mips`, `mips32r6, `powerpc`, `riscv32`, `sparc`, `hexagon` | 4 bytes |
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//! | `x86`, `arm`, `mips`, `mips32r6, `powerpc`, `riscv32`, `sparc`, `hexagon` | 4 bytes |
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//! | `x86_64`, `aarch64`, `loongarch64`, `mips64`, `mips64r6`, `powerpc64`, `riscv64`, `sparc64` | 8 bytes |
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//! | `x86_64`, `aarch64`, `loongarch64`, `mips64`, `mips64r6`, `powerpc64`, `riscv64`, `sparc64`, `s390x` | 8 bytes |
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//! | `s390x`, `powerpc64` with `target_feature = "quadword-atomics"` | 16 bytes |
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//!
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//!
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//! Atomics loads that are larger than this limit as well as atomic loads with ordering other
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//! Atomics loads that are larger than this limit as well as atomic loads with ordering other
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//! than `Relaxed`, as well as *all* atomic loads on targets not listed in the table, might still be
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//! than `Relaxed`, as well as *all* atomic loads on targets not listed in the table, might still be
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