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Replace every String in Target(Options) with Cow<'static, str>

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Loïc BRANSTETT
2022-03-22 11:43:05 +01:00
parent 15a242a432
commit ccff48f97b
223 changed files with 1252 additions and 1243 deletions
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2
compiler/rustc_codegen_llvm/src/attributes.rs
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@@ -116,7 +116,7 @@ fn instrument_function_attr<'ll>(cx: &CodegenCx<'ll, '_>) -> Option<&'ll Attribu
// The function name varies on platforms.
// See test/CodeGen/mcount.c in clang.
let mcount_name = cx.sess().target.mcount.as_str();
let mcount_name = cx.sess().target.mcount.as_ref();
Some(llvm::CreateAttrStringValue(
cx.llcx,

2
compiler/rustc_codegen_llvm/src/builder.rs
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@@ -1452,7 +1452,7 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
}
fn fptoint_sat_broken_in_llvm(&self) -> bool {
match self.tcx.sess.target.arch.as_str() {
match self.tcx.sess.target.arch.as_ref() {
// FIXME - https://bugs.llvm.org/show_bug.cgi?id=50083
"riscv64" => llvm_util::get_version() < (13, 0, 0),
_ => false,

4
compiler/rustc_codegen_llvm/src/context.rs
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@@ -134,7 +134,7 @@ pub unsafe fn create_module<'ll>(
let mod_name = SmallCStr::new(mod_name);
let llmod = llvm::LLVMModuleCreateWithNameInContext(mod_name.as_ptr(), llcx);
let mut target_data_layout = sess.target.data_layout.clone();
let mut target_data_layout = sess.target.data_layout.to_string();
let llvm_version = llvm_util::get_version();
if llvm_version < (13, 0, 0) {
if sess.target.arch == "powerpc64" {
@@ -859,7 +859,7 @@ impl<'ll> CodegenCx<'ll, '_> {
// This isn't an "LLVM intrinsic", but LLVM's optimization passes
// recognize it like one and we assume it exists in `core::slice::cmp`
match self.sess().target.arch.as_str() {
match self.sess().target.arch.as_ref() {
"avr" | "msp430" => ifn!("memcmp", fn(i8p, i8p, t_isize) -> t_i16),
_ => ifn!("memcmp", fn(i8p, i8p, t_isize) -> t_i32),
}

2
compiler/rustc_codegen_llvm/src/intrinsic.rs
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@@ -329,7 +329,7 @@ impl<'ll, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'_, 'll, 'tcx> {
let b_ptr = self.bitcast(b, i8p_ty);
let n = self.const_usize(layout.size().bytes());
let cmp = self.call_intrinsic("memcmp", &[a_ptr, b_ptr, n]);
match self.cx.sess().target.arch.as_str() {
match self.cx.sess().target.arch.as_ref() {
"avr" | "msp430" => self.icmp(IntPredicate::IntEQ, cmp, self.const_i16(0)),
_ => self.icmp(IntPredicate::IntEQ, cmp, self.const_i32(0)),
}

10
compiler/rustc_codegen_llvm/src/llvm_util.rs
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@@ -61,8 +61,8 @@ unsafe fn configure_llvm(sess: &Session) {
full_arg.trim().split(|c: char| c == '=' || c.is_whitespace()).next().unwrap_or("")
}
let cg_opts = sess.opts.cg.llvm_args.iter();
let tg_opts = sess.target.llvm_args.iter();
let cg_opts = sess.opts.cg.llvm_args.iter().map(AsRef::as_ref);
let tg_opts = sess.target.llvm_args.iter().map(AsRef::as_ref);
let sess_args = cg_opts.chain(tg_opts);
let user_specified_args: FxHashSet<_> =
@@ -375,8 +375,10 @@ fn handle_native(name: &str) -> &str {
}
pub fn target_cpu(sess: &Session) -> &str {
let name = sess.opts.cg.target_cpu.as_ref().unwrap_or(&sess.target.cpu);
handle_native(name)
match sess.opts.cg.target_cpu {
Some(ref name) => handle_native(name),
None => handle_native(sess.target.cpu.as_ref()),
}
}
/// The list of LLVM features computed from CLI flags (`-Ctarget-cpu`, `-Ctarget-feature`,