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Merge commit 'fda0bb9588912a3e0606e880ca9f6e913cf8a5a4' into subtree-update_cg_gcc_2025-06-18

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This commit is contained in:
Guillaume Gomez
2025-06-18 15:11:44 +02:00
parent 6f935a044d fda0bb9588
commit c48d8d4d80
54 changed files with 11917 additions and 10357 deletions
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9
compiler/rustc_codegen_gcc/src/asm.rs
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@@ -1,3 +1,5 @@
// cSpell:ignoreRegExp [afkspqvwy]reg
use std::borrow::Cow;
use gccjit::{LValue, RValue, ToRValue, Type};
@@ -138,7 +140,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
// `outputs.len() + inputs.len()`.
let mut labels = vec![];
// Clobbers collected from `out("explicit register") _` and `inout("expl_reg") var => _`
// Clobbers collected from `out("explicit register") _` and `inout("explicit_reg") var => _`
let mut clobbers = vec![];
// We're trying to preallocate space for the template
@@ -203,7 +205,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
// is also used as an in register, do not add it to the clobbers list.
// it will be treated as a lateout register with `out_place: None`
if !late {
bug!("input registers can only be used as lateout regisers");
bug!("input registers can only be used as lateout registers");
}
("r", dummy_output_type(self.cx, reg.reg_class()))
} else {
@@ -641,7 +643,8 @@ fn explicit_reg_to_gcc(reg: InlineAsmReg) -> &'static str {
},
}
}
InlineAsmReg::Arm(reg) => reg.name(),
InlineAsmReg::AArch64(reg) => reg.name(),
_ => unimplemented!(),
}
}