Also fix if in else
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@@ -69,29 +69,27 @@ where
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if must_use_stack {
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arg.make_indirect_byval(None);
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} else {
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if is_xtensa_aggregate(arg) {
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// Aggregates which are <= max_size will be passed in
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// registers if possible, so coerce to integers.
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} else if is_xtensa_aggregate(arg) {
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// Aggregates which are <= max_size will be passed in
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// registers if possible, so coerce to integers.
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// Use a single `xlen` int if possible, 2 * `xlen` if 2 * `xlen` alignment
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// is required, and a 2-element `xlen` array if only `xlen` alignment is
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// required.
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if size <= 32 {
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arg.cast_to(Reg::i32());
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} else {
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let reg = if needed_align == 2 * 32 { Reg::i64() } else { Reg::i32() };
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let total = Size::from_bits(((size + 32 - 1) / 32) * 32);
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arg.cast_to(Uniform::new(reg, total));
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}
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// Use a single `xlen` int if possible, 2 * `xlen` if 2 * `xlen` alignment
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// is required, and a 2-element `xlen` array if only `xlen` alignment is
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// required.
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if size <= 32 {
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arg.cast_to(Reg::i32());
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} else {
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// All integral types are promoted to `xlen`
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// width.
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//
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// We let the LLVM backend handle integral types >= xlen.
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if size < 32 {
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arg.extend_integer_width_to(32);
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}
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let reg = if needed_align == 2 * 32 { Reg::i64() } else { Reg::i32() };
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let total = Size::from_bits(((size + 32 - 1) / 32) * 32);
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arg.cast_to(Uniform::new(reg, total));
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}
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} else {
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// All integral types are promoted to `xlen`
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// width.
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//
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// We let the LLVM backend handle integral types >= xlen.
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if size < 32 {
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arg.extend_integer_width_to(32);
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}
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}
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}
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