Merge commit '40b00f4200fbdeefd11815398cb46394b8cb0a5e' into sync_cg_clif-2021-12-30

This commit is contained in:
bjorn3
2021-12-30 14:53:41 +01:00
20 changed files with 90 additions and 81 deletions

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@@ -67,7 +67,7 @@ impl WriterRelocate {
}
/// Perform the collected relocations to be usable for JIT usage.
#[cfg(feature = "jit")]
#[cfg(all(feature = "jit", not(windows)))]
pub(super) fn relocate_for_jit(mut self, jit_module: &cranelift_jit::JITModule) -> Vec<u8> {
for reloc in self.relocs.drain(..) {
match reloc.name {

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@@ -10,7 +10,7 @@ use crate::prelude::*;
use rustc_index::vec::IndexVec;
use cranelift_codegen::entity::EntityRef;
use cranelift_codegen::ir::{LabelValueLoc, ValueLabel};
use cranelift_codegen::ir::{Endianness, LabelValueLoc, ValueLabel};
use cranelift_codegen::isa::TargetIsa;
use cranelift_codegen::ValueLocRange;
@@ -23,15 +23,6 @@ use gimli::{Encoding, Format, LineEncoding, RunTimeEndian, X86_64};
pub(crate) use emit::{DebugReloc, DebugRelocName};
pub(crate) use unwind::UnwindContext;
fn target_endian(tcx: TyCtxt<'_>) -> RunTimeEndian {
use rustc_target::abi::Endian;
match tcx.data_layout.endian {
Endian::Big => RunTimeEndian::Big,
Endian::Little => RunTimeEndian::Little,
}
}
pub(crate) struct DebugContext<'tcx> {
tcx: TyCtxt<'tcx>,
@@ -60,6 +51,11 @@ impl<'tcx> DebugContext<'tcx> {
address_size: isa.frontend_config().pointer_bytes(),
};
let endian = match isa.endianness() {
Endianness::Little => RunTimeEndian::Little,
Endianness::Big => RunTimeEndian::Big,
};
let mut dwarf = DwarfUnit::new(encoding);
let producer = format!(
@@ -108,7 +104,7 @@ impl<'tcx> DebugContext<'tcx> {
DebugContext {
tcx,
endian: target_endian(tcx),
endian,
dwarf,
unit_range_list: RangeList(Vec::new()),

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@@ -2,6 +2,7 @@
use crate::prelude::*;
use cranelift_codegen::ir::Endianness;
use cranelift_codegen::isa::{unwind::UnwindInfo, TargetIsa};
use cranelift_object::ObjectProduct;
@@ -17,8 +18,11 @@ pub(crate) struct UnwindContext {
}
impl UnwindContext {
pub(crate) fn new(tcx: TyCtxt<'_>, isa: &dyn TargetIsa, pic_eh_frame: bool) -> Self {
let endian = super::target_endian(tcx);
pub(crate) fn new(isa: &dyn TargetIsa, pic_eh_frame: bool) -> Self {
let endian = match isa.endianness() {
Endianness::Little => RunTimeEndian::Little,
Endianness::Big => RunTimeEndian::Big,
};
let mut frame_table = FrameTable::default();
let cie_id = if let Some(mut cie) = isa.create_systemv_cie() {