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Add _mm_loadu_si64 (#870)

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Co-authored-by: Amanieu d'Antras <amanieu@gmail.com>
This commit is contained in:
Ivan Tham
2020-07-17 01:01:46 +08:00
committed by GitHub
parent 5bfcdc0d57
commit 7f78306761
1 changed files with 20 additions and 0 deletions
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20
library/stdarch/crates/core_arch/src/x86/sse.rs
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@@ -1251,6 +1251,19 @@ pub unsafe fn _mm_loadr_ps(p: *const f32) -> __m128 {
simd_shuffle4(a, a, [3, 2, 1, 0]) simd_shuffle4(a, a, [3, 2, 1, 0])
} }
/// Loads unaligned 64-bits of integer data from memory into new vector.
///
/// `mem_addr` does not need to be aligned on any particular boundary.
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_loadu_si64)
#[inline]
#[target_feature(enable = "sse")]
#[cfg_attr(all(test, not(target_arch = "x86")), assert_instr(movq))]
#[stable(feature = "simd_x86_mm_loadu_si64", since = "1.46.0")]
pub unsafe fn _mm_loadu_si64(mem_addr: *const u8) -> __m128i {
transmute(i64x2(0, ptr::read_unaligned(mem_addr as *const i64)))
}
/// Stores the upper half of `a` (64 bits) into memory. /// Stores the upper half of `a` (64 bits) into memory.
/// ///
/// This intrinsic corresponds to the `MOVHPS` instruction. The compiler may /// This intrinsic corresponds to the `MOVHPS` instruction. The compiler may
@@ -3658,6 +3671,13 @@ mod tests {
assert_eq_m128(r, e); assert_eq_m128(r, e);
} }
#[simd_test(enable = "sse2")]
unsafe fn test_mm_loadu_si64() {
let a = _mm_setr_epi64x(5, 6);
let r = _mm_loadu_si64(&a as *const _ as *const _);
assert_eq_m128i(r, _mm_set_epi64x(5, 0));
}
#[simd_test(enable = "sse")] #[simd_test(enable = "sse")]
unsafe fn test_mm_storeh_pi() { unsafe fn test_mm_storeh_pi() {
let mut vals = [0.0f32; 8]; let mut vals = [0.0f32; 8];