intrinsics: reduce references to LLVM and update notes on where the implementations live
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@@ -1,7 +1,10 @@
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//! Compiler intrinsics.
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//!
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//! The corresponding definitions are in <https://github.com/rust-lang/rust/blob/master/compiler/rustc_codegen_llvm/src/intrinsic.rs>.
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//! The corresponding const implementations are in <https://github.com/rust-lang/rust/blob/master/compiler/rustc_const_eval/src/interpret/intrinsics.rs>.
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//! These are the imports making intrinsics available to Rust code. The actual implementations live in the compiler.
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//! Some of these intrinsics are lowered to MIR in <https://github.com/rust-lang/rust/blob/master/compiler/rustc_mir_transform/src/lower_intrinsics.rs>.
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//! The remaining intrinsics are implemented for the LLVM backend in <https://github.com/rust-lang/rust/blob/master/compiler/rustc_codegen_ssa/src/mir/intrinsic.rs>
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//! and <https://github.com/rust-lang/rust/blob/master/compiler/rustc_codegen_llvm/src/intrinsic.rs>,
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//! and for const evaluation in <https://github.com/rust-lang/rust/blob/master/compiler/rustc_const_eval/src/interpret/intrinsics.rs>.
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//!
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//! # Const intrinsics
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//!
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@@ -20,28 +23,14 @@
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//!
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//! The volatile intrinsics provide operations intended to act on I/O
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//! memory, which are guaranteed to not be reordered by the compiler
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//! across other volatile intrinsics. See the LLVM documentation on
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//! [[volatile]].
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//!
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//! [volatile]: https://llvm.org/docs/LangRef.html#volatile-memory-accesses
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//! across other volatile intrinsics. See [`read_volatile`][ptr::read_volatile]
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//! and [`write_volatile`][ptr::write_volatile].
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//!
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//! # Atomics
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//!
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//! The atomic intrinsics provide common atomic operations on machine
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//! words, with multiple possible memory orderings. They obey the same
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//! semantics as C++11. See the LLVM documentation on [[atomics]].
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//!
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//! [atomics]: https://llvm.org/docs/Atomics.html
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//!
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//! A quick refresher on memory ordering:
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//!
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//! * Acquire - a barrier for acquiring a lock. Subsequent reads and writes
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//! take place after the barrier.
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//! * Release - a barrier for releasing a lock. Preceding reads and writes
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//! take place before the barrier.
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//! * Sequentially consistent - sequentially consistent operations are
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//! guaranteed to happen in order. This is the standard mode for working
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//! with atomic types and is equivalent to Java's `volatile`.
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//! words, with multiple possible memory orderings. See the
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//! [atomic types][crate::sync::atomic] docs for details.
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//!
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//! # Unwinding
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//!
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