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Merge commit '4b5c44b14166083eef8d71f15f5ea1f53fc976a0' into subtree-update_cg_gcc_2025-06-30

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This commit is contained in:
Guillaume Gomez
2025-06-30 16:12:42 +02:00
parent f19142044f 4b5c44b141
commit 666934ac54
12 changed files with 131 additions and 171 deletions
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124
compiler/rustc_codegen_gcc/src/intrinsic/archs.rs
View File

@@ -1,9 +1,9 @@
// File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`
// DO NOT EDIT IT!
/// Translate a given LLVM intrinsic name to an equivalent GCC one.
fn map_arch_intrinsic(name: &str) -> &str {
let Some(name) = name.strip_prefix("llvm.") else {
unimplemented!("***** unsupported LLVM intrinsic {}", name)
fn map_arch_intrinsic(full_name: &str) -> &'static str {
let Some(name) = full_name.strip_prefix("llvm.") else {
unimplemented!("***** unsupported LLVM intrinsic {}", full_name)
};
let Some((arch, name)) = name.split_once('.') else {
unimplemented!("***** unsupported LLVM intrinsic {}", name)
@@ -11,7 +11,7 @@ fn map_arch_intrinsic(name: &str) -> &str {
match arch {
"AMDGPU" => {
#[allow(non_snake_case)]
fn AMDGPU(name: &str) -> &str {
fn AMDGPU(name: &str, full_name: &str) -> &'static str {
match name {
// AMDGPU
"div.fixup.f32" => "__builtin_amdgpu_div_fixup",
@@ -42,14 +42,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"trig.preop.f64" => "__builtin_amdgpu_trig_preop",
"trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
"trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
AMDGPU(name)
AMDGPU(name, full_name)
}
"aarch64" => {
#[allow(non_snake_case)]
fn aarch64(name: &str) -> &str {
fn aarch64(name: &str, full_name: &str) -> &'static str {
match name {
// aarch64
"chkfeat" => "__builtin_arm_chkfeat",
@@ -75,14 +75,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"tcommit" => "__builtin_arm_tcommit",
"tstart" => "__builtin_arm_tstart",
"ttest" => "__builtin_arm_ttest",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
aarch64(name)
aarch64(name, full_name)
}
"amdgcn" => {
#[allow(non_snake_case)]
fn amdgcn(name: &str) -> &str {
fn amdgcn(name: &str, full_name: &str) -> &'static str {
match name {
// amdgcn
"alignbyte" => "__builtin_amdgcn_alignbyte",
@@ -99,6 +99,8 @@ fn map_arch_intrinsic(name: &str) -> &str {
"cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
"cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
"cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
"cvt.pk.f16.bf8" => "__builtin_amdgcn_cvt_pk_f16_bf8",
"cvt.pk.f16.fp8" => "__builtin_amdgcn_cvt_pk_f16_fp8",
"cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
"cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
"cvt.pk.fp8.f32" => "__builtin_amdgcn_cvt_pk_fp8_f32",
@@ -292,6 +294,7 @@ fn map_arch_intrinsic(name: &str) -> &str {
"s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
"s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
"s.setprio" => "__builtin_amdgcn_s_setprio",
"s.setprio.inc.wg" => "__builtin_amdgcn_s_setprio_inc_wg",
"s.setreg" => "__builtin_amdgcn_s_setreg",
"s.sleep" => "__builtin_amdgcn_s_sleep",
"s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
@@ -356,14 +359,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"workitem.id.x" => "__builtin_amdgcn_workitem_id_x",
"workitem.id.y" => "__builtin_amdgcn_workitem_id_y",
"workitem.id.z" => "__builtin_amdgcn_workitem_id_z",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
amdgcn(name)
amdgcn(name, full_name)
}
"arm" => {
#[allow(non_snake_case)]
fn arm(name: &str) -> &str {
fn arm(name: &str, full_name: &str) -> &'static str {
match name {
// arm
"cdp" => "__builtin_arm_cdp",
@@ -465,14 +468,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"usub8" => "__builtin_arm_usub8",
"uxtab16" => "__builtin_arm_uxtab16",
"uxtb16" => "__builtin_arm_uxtb16",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
arm(name)
arm(name, full_name)
}
"bpf" => {
#[allow(non_snake_case)]
fn bpf(name: &str) -> &str {
fn bpf(name: &str, full_name: &str) -> &'static str {
match name {
// bpf
"btf.type.id" => "__builtin_bpf_btf_type_id",
@@ -487,25 +490,25 @@ fn map_arch_intrinsic(name: &str) -> &str {
"preserve.field.info" => "__builtin_bpf_preserve_field_info",
"preserve.type.info" => "__builtin_bpf_preserve_type_info",
"pseudo" => "__builtin_bpf_pseudo",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
bpf(name)
bpf(name, full_name)
}
"cuda" => {
#[allow(non_snake_case)]
fn cuda(name: &str) -> &str {
fn cuda(name: &str, full_name: &str) -> &'static str {
match name {
// cuda
"syncthreads" => "__syncthreads",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
cuda(name)
cuda(name, full_name)
}
"hexagon" => {
#[allow(non_snake_case)]
fn hexagon(name: &str) -> &str {
fn hexagon(name: &str, full_name: &str) -> &'static str {
match name {
// hexagon
"A2.abs" => "__builtin_HEXAGON_A2_abs",
@@ -2479,14 +2482,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"prefetch" => "__builtin_HEXAGON_prefetch",
"vmemcpy" => "__builtin_hexagon_vmemcpy",
"vmemset" => "__builtin_hexagon_vmemset",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
hexagon(name)
hexagon(name, full_name)
}
"loongarch" => {
#[allow(non_snake_case)]
fn loongarch(name: &str) -> &str {
fn loongarch(name: &str, full_name: &str) -> &'static str {
match name {
// loongarch
"asrtgt.d" => "__builtin_loongarch_asrtgt_d",
@@ -3988,14 +3991,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"movfcsr2gr" => "__builtin_loongarch_movfcsr2gr",
"movgr2fcsr" => "__builtin_loongarch_movgr2fcsr",
"syscall" => "__builtin_loongarch_syscall",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
loongarch(name)
loongarch(name, full_name)
}
"mips" => {
#[allow(non_snake_case)]
fn mips(name: &str) -> &str {
fn mips(name: &str, full_name: &str) -> &'static str {
match name {
// mips
"absq.s.ph" => "__builtin_mips_absq_s_ph",
@@ -4669,14 +4672,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"wrdsp" => "__builtin_mips_wrdsp",
"xor.v" => "__builtin_msa_xor_v",
"xori.b" => "__builtin_msa_xori_b",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
mips(name)
mips(name, full_name)
}
"nvvm" => {
#[allow(non_snake_case)]
fn nvvm(name: &str) -> &str {
fn nvvm(name: &str, full_name: &str) -> &'static str {
match name {
// nvvm
"abs.i" => "__nvvm_abs_i",
@@ -5024,6 +5027,7 @@ fn map_arch_intrinsic(name: &str) -> &str {
"nanosleep" => "__nvvm_nanosleep",
"neg.bf16" => "__nvvm_neg_bf16",
"neg.bf16x2" => "__nvvm_neg_bf16x2",
"pm.event.mask" => "__nvvm_pm_event_mask",
"popc.i" => "__nvvm_popc_i",
"popc.ll" => "__nvvm_popc_ll",
"prmt" => "__nvvm_prmt",
@@ -5448,14 +5452,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"vote.ballot.sync" => "__nvvm_vote_ballot_sync",
"vote.uni" => "__nvvm_vote_uni",
"vote.uni.sync" => "__nvvm_vote_uni_sync",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
nvvm(name)
nvvm(name, full_name)
}
"ppc" => {
#[allow(non_snake_case)]
fn ppc(name: &str) -> &str {
fn ppc(name: &str, full_name: &str) -> &'static str {
match name {
// ppc
"addex" => "__builtin_ppc_addex",
@@ -5842,7 +5846,10 @@ fn map_arch_intrinsic(name: &str) -> &str {
"mulhdu" => "__builtin_ppc_mulhdu",
"mulhw" => "__builtin_ppc_mulhw",
"mulhwu" => "__builtin_ppc_mulhwu",
"national2packed" => "__builtin_ppc_national2packed",
"pack.longdouble" => "__builtin_pack_longdouble",
"packed2national" => "__builtin_ppc_packed2national",
"packed2zoned" => "__builtin_ppc_packed2zoned",
"pdepd" => "__builtin_pdepd",
"pextd" => "__builtin_pextd",
"qpx.qvfabs" => "__builtin_qpx_qvfabs",
@@ -6035,14 +6042,15 @@ fn map_arch_intrinsic(name: &str) -> &str {
"vsx.xxinsertw" => "__builtin_vsx_xxinsertw",
"vsx.xxleqv" => "__builtin_vsx_xxleqv",
"vsx.xxpermx" => "__builtin_vsx_xxpermx",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
"zoned2packed" => "__builtin_ppc_zoned2packed",
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
ppc(name)
ppc(name, full_name)
}
"ptx" => {
#[allow(non_snake_case)]
fn ptx(name: &str) -> &str {
fn ptx(name: &str, full_name: &str) -> &'static str {
match name {
// ptx
"bar.sync" => "__builtin_ptx_bar_sync",
@@ -6063,14 +6071,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"read.pm3" => "__builtin_ptx_read_pm3",
"read.smid" => "__builtin_ptx_read_smid",
"read.warpid" => "__builtin_ptx_read_warpid",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
ptx(name)
ptx(name, full_name)
}
"r600" => {
#[allow(non_snake_case)]
fn r600(name: &str) -> &str {
fn r600(name: &str, full_name: &str) -> &'static str {
match name {
// r600
"group.barrier" => "__builtin_r600_group_barrier",
@@ -6088,14 +6096,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"read.tidig.x" => "__builtin_r600_read_tidig_x",
"read.tidig.y" => "__builtin_r600_read_tidig_y",
"read.tidig.z" => "__builtin_r600_read_tidig_z",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
r600(name)
r600(name, full_name)
}
"riscv" => {
#[allow(non_snake_case)]
fn riscv(name: &str) -> &str {
fn riscv(name: &str, full_name: &str) -> &'static str {
match name {
// riscv
"aes32dsi" => "__builtin_riscv_aes32dsi",
@@ -6119,14 +6127,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"sha512sum0r" => "__builtin_riscv_sha512sum0r",
"sha512sum1" => "__builtin_riscv_sha512sum1",
"sha512sum1r" => "__builtin_riscv_sha512sum1r",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
riscv(name)
riscv(name, full_name)
}
"s390" => {
#[allow(non_snake_case)]
fn s390(name: &str) -> &str {
fn s390(name: &str, full_name: &str) -> &'static str {
match name {
// s390
"bdepg" => "__builtin_s390_bdepg",
@@ -6313,14 +6321,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"vupllf" => "__builtin_s390_vupllf",
"vupllg" => "__builtin_s390_vupllg",
"vupllh" => "__builtin_s390_vupllh",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
s390(name)
s390(name, full_name)
}
"ve" => {
#[allow(non_snake_case)]
fn ve(name: &str) -> &str {
fn ve(name: &str, full_name: &str) -> &'static str {
match name {
// ve
"vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
@@ -7586,14 +7594,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
"vl.vxor.vvvvl" => "__builtin_ve_vl_vxor_vvvvl",
"vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
"vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
ve(name)
ve(name, full_name)
}
"x86" => {
#[allow(non_snake_case)]
fn x86(name: &str) -> &str {
fn x86(name: &str, full_name: &str) -> &'static str {
match name {
// x86
"aadd32" => "__builtin_ia32_aadd32",
@@ -10154,25 +10162,25 @@ fn map_arch_intrinsic(name: &str) -> &str {
"xresldtrk" => "__builtin_ia32_xresldtrk",
"xsusldtrk" => "__builtin_ia32_xsusldtrk",
"xtest" => "__builtin_ia32_xtest",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
x86(name)
x86(name, full_name)
}
"xcore" => {
#[allow(non_snake_case)]
fn xcore(name: &str) -> &str {
fn xcore(name: &str, full_name: &str) -> &'static str {
match name {
// xcore
"bitrev" => "__builtin_bitrev",
"getid" => "__builtin_getid",
"getps" => "__builtin_getps",
"setps" => "__builtin_setps",
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
xcore(name)
xcore(name, full_name)
}
_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
_ => unimplemented!("***** unsupported LLVM architecture {arch}, intrinsic:{full_name}"),
}
}

37
compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs
View File

@@ -648,6 +648,11 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
new_args.push(handle);
args = new_args.into();
}
"__builtin_ia32_rdtscp" => {
let result = builder.current_func().new_local(None, builder.u32_type, "result");
let new_args = vec![result.get_address(None).to_rvalue()];
args = new_args.into();
}
_ => (),
}
} else {
@@ -764,6 +769,14 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
new_args.swap(0, 1);
args = new_args.into();
}
"__builtin_ia32_dpps256" => {
let mut new_args = args.to_vec();
// NOTE: without this cast to u8 (and it needs to be a u8 to fix the issue), we
// would get the following error:
// the last argument must be an 8-bit immediate
new_args[2] = builder.context.new_cast(None, new_args[2], builder.cx.type_u8());
args = new_args.into();
}
_ => (),
}
}
@@ -935,6 +948,19 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(
);
return_value = result.to_rvalue();
}
"__builtin_ia32_rdtscp" => {
let field1 = builder.context.new_field(None, return_value.get_type(), "rdtscpField1");
let return2 = args[0].dereference(None).to_rvalue();
let field2 = builder.context.new_field(None, return2.get_type(), "rdtscpField2");
let struct_type =
builder.context.new_struct_type(None, "rdtscpResult", &[field1, field2]);
return_value = builder.context.new_struct_constructor(
None,
struct_type.as_type(),
None,
&[return_value, return2],
);
}
_ => (),
}
@@ -1529,6 +1555,17 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
"llvm.x86.aesdecwide128kl" => "__builtin_ia32_aesdecwide128kl_u8",
"llvm.x86.aesencwide256kl" => "__builtin_ia32_aesencwide256kl_u8",
"llvm.x86.aesdecwide256kl" => "__builtin_ia32_aesdecwide256kl_u8",
"llvm.x86.avx512.uitofp.round.v8f16.v8i16" => "__builtin_ia32_vcvtuw2ph128_mask",
"llvm.x86.avx512.uitofp.round.v16f16.v16i16" => "__builtin_ia32_vcvtuw2ph256_mask",
"llvm.x86.avx512.uitofp.round.v32f16.v32i16" => "__builtin_ia32_vcvtuw2ph512_mask_round",
"llvm.x86.avx512.uitofp.round.v8f16.v8i32" => "__builtin_ia32_vcvtudq2ph256_mask",
"llvm.x86.avx512.uitofp.round.v16f16.v16i32" => "__builtin_ia32_vcvtudq2ph512_mask_round",
"llvm.x86.avx512.uitofp.round.v8f16.v8i64" => "__builtin_ia32_vcvtuqq2ph512_mask_round",
"llvm.x86.avx512.uitofp.round.v8f64.v8i64" => "__builtin_ia32_cvtuqq2pd512_mask",
"llvm.x86.avx512.uitofp.round.v2f64.v2i64" => "__builtin_ia32_cvtuqq2pd128_mask",
"llvm.x86.avx512.uitofp.round.v4f64.v4i64" => "__builtin_ia32_cvtuqq2pd256_mask",
"llvm.x86.avx512.uitofp.round.v8f32.v8i64" => "__builtin_ia32_cvtuqq2ps512_mask",
"llvm.x86.avx512.uitofp.round.v4f32.v4i64" => "__builtin_ia32_cvtuqq2ps256_mask",
// TODO: support the tile builtins:
"llvm.x86.ldtilecfg" => "__builtin_trap",

4
compiler/rustc_codegen_gcc/src/intrinsic/mod.rs
View File

@@ -114,7 +114,6 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
}
sym::copysignf32 => "copysignf",
sym::copysignf64 => "copysign",
sym::copysignf128 => "copysignl",
sym::floorf32 => "floorf",
sym::floorf64 => "floor",
sym::ceilf32 => "ceilf",
@@ -238,6 +237,7 @@ fn get_simple_function_f128_2args<'gcc, 'tcx>(
let func_name = match name {
sym::maxnumf128 => "fmaxf128",
sym::minnumf128 => "fminf128",
sym::copysignf128 => "copysignf128",
_ => return None,
};
Some(cx.context.new_function(
@@ -261,6 +261,7 @@ fn f16_builtin<'gcc, 'tcx>(
let f32_type = cx.type_f32();
let builtin_name = match name {
sym::ceilf16 => "__builtin_ceilf",
sym::copysignf16 => "__builtin_copysignf",
sym::floorf16 => "__builtin_floorf",
sym::fmaf16 => "fmaf",
sym::maxnumf16 => "__builtin_fmaxf",
@@ -330,6 +331,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
)
}
sym::ceilf16
| sym::copysignf16
| sym::floorf16
| sym::fmaf16
| sym::maxnumf16