convert _mm256_mask_cmp_epu16_mask to const generics

This commit is contained in:
Rémy Rakic
2021-03-04 22:29:17 +01:00
committed by Amanieu d'Antras
parent 4cd835b9d2
commit 4dc43fadf5

View File

@@ -3743,22 +3743,17 @@ pub unsafe fn _mm256_cmp_epu16_mask<const IMM8: i32>(a: __m256i, b: __m256i) ->
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_cmp_epu16_mask&expand=714)
#[inline]
#[target_feature(enable = "avx512bw,avx512vl")]
#[rustc_args_required_const(3)]
#[cfg_attr(test, assert_instr(vpcmp, imm8 = 0))]
pub unsafe fn _mm256_mask_cmp_epu16_mask(
#[rustc_legacy_const_generics(3)]
#[cfg_attr(test, assert_instr(vpcmp, IMM8 = 0))]
pub unsafe fn _mm256_mask_cmp_epu16_mask<const IMM8: i32>(
k1: __mmask16,
a: __m256i,
b: __m256i,
imm8: i32,
) -> __mmask16 {
static_assert_imm3!(IMM8);
let a = a.as_u16x16();
let b = b.as_u16x16();
macro_rules! call {
($imm3:expr) => {
vpcmpuw256(a, b, $imm3, k1)
};
}
let r = constify_imm3!(imm8, call);
let r = vpcmpuw256(a, b, IMM8, k1);
transmute(r)
}
@@ -13469,7 +13464,7 @@ mod tests {
let a = _mm256_set1_epi16(0);
let b = _mm256_set1_epi16(1);
let mask = 0b01010101_01010101;
let r = _mm256_mask_cmp_epu16_mask(mask, a, b, _MM_CMPINT_LT);
let r = _mm256_mask_cmp_epu16_mask::<_MM_CMPINT_LT>(mask, a, b);
assert_eq!(r, 0b01010101_01010101);
}