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fix errors/warnings from the stabilization of cfg_target_feature and target_feature (#432)

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* fix build after stabilization of cfg_target_feature and target_feature

* fix doc tests

* fix spurious unused_attributes warning

* fix more unused attribute warnings

* More unnecessary target features

* Remove no longer needed trait imports

* Remove fixed upstream workarounds

* Fix parsing the #[assert_instr] macro

Following upstream proc_macro changes

* Fix form and parsing of #[simd_test]

* Don't use Cargo features for testing modes

Instead use RUSTFLAGS with `--cfg`. This'll help us be compatible with the
latest Cargo where a tweak to workspaces and features made the previous
invocations we had invalid.

* Don't thread RUSTFLAGS through docker

* Re-gate on x86 verification

Closes #411
This commit is contained in:
gnzlbg
2018-04-27 04:54:15 +02:00
committed by Alex Crichton
parent 189283e76f
commit 30962e58e6
62 changed files with 1135 additions and 1188 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
library/stdarch/.travis.yml
View File

@@ -8,7 +8,7 @@ matrix:
- env: TARGET=i586-unknown-linux-gnu
- env: TARGET=i686-unknown-linux-gnu
- env: TARGET=x86_64-unknown-linux-gnu NO_ADD=1
- env: TARGET=x86_64-unknown-linux-gnu-emulated NO_ADD=1 STDSIMD_TEST_EVERYTHING=1 FEATURES="intel_sde"
- env: TARGET=x86_64-unknown-linux-gnu-emulated NO_ADD=1 STDSIMD_TEST_EVERYTHING=1
- env: TARGET=arm-unknown-linux-gnueabihf
- env: TARGET=armv7-unknown-linux-gnueabihf
- env: TARGET=aarch64-unknown-linux-gnu
@@ -55,7 +55,6 @@ matrix:
cargo clippy --all -- -D clippy-pedantic
allow_failures:
- env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1
- env: VERIFY_X86
before_install:
# FIXME (travis-ci/travis-ci#8920) shouldn't be necessary...

1
library/stdarch/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile
View File

@@ -11,3 +11,4 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
RUN wget https://github.com/gnzlbg/intel_sde/raw/master/sde-external-8.16.0-2018-01-30-lin.tar.bz2
RUN tar -xjf sde-external-8.16.0-2018-01-30-lin.tar.bz2
ENV CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="/sde-external-8.16.0-2018-01-30-lin/sde64 --"
ENV RUSTFLAGS --cfg stdsimd_intel_sde

3
library/stdarch/ci/run-docker.sh
View File

@@ -17,7 +17,6 @@ run() {
--env CARGO_HOME=/cargo \
--volume `rustc --print sysroot`:/rust:ro \
--env TARGET=$target \
--env FEATURES=$2 \
--env STDSIMD_TEST_EVERYTHING \
--volume `pwd`:/checkout:ro \
--volume `pwd`/target:/checkout/target \
@@ -33,5 +32,5 @@ if [ -z "$1" ]; then
run $d
done
else
run $1 $2
run $1
fi

5
library/stdarch/ci/run.sh
View File

@@ -10,7 +10,7 @@ export RUST_TEST_THREADS=1
#export RUST_BACKTRACE=full
#export RUST_TEST_NOCAPTURE=1
FEATURES="strict,$FEATURES"
RUSTFLAGS="$RUSTFLAGS --cfg stdsimd_strict"
# FIXME: on armv7 neon intrinsics require the neon target-feature to be
# unconditionally enabled.
@@ -27,9 +27,8 @@ echo "FEATURES=${FEATURES}"
echo "OBJDUMP=${OBJDUMP}"
cargo_test() {
cmd="cargo test --target=$TARGET --features $FEATURES $1"
cmd="cargo test --target=$TARGET $1"
cmd="$cmd -p coresimd -p stdsimd"
cmd="$cmd --manifest-path crates/stdsimd/Cargo.toml"
cmd="$cmd -- $2"
$cmd
}

28
library/stdarch/coresimd/aarch64/crypto.rs
View File

@@ -189,7 +189,7 @@ mod tests {
use std::mem;
use stdsimd_test::simd_test;
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vaeseq_u8() {
let data = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)
.into_bits();
@@ -219,7 +219,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vaesdq_u8() {
let data = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)
.into_bits();
@@ -249,7 +249,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vaesmcq_u8() {
let data = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)
.into_bits();
@@ -277,7 +277,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vaesimcq_u8() {
let data = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)
.into_bits();
@@ -305,13 +305,13 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha1h_u32() {
assert_eq!(vsha1h_u32(0x1234), 0x048d);
assert_eq!(vsha1h_u32(0x5678), 0x159e);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha1su0q_u32() {
let r: u32x4 = vsha1su0q_u32(
u32x4::new(0x1234_u32, 0x5678_u32, 0x9abc_u32, 0xdef0_u32)
@@ -324,7 +324,7 @@ mod tests {
assert_eq!(r, u32x4::new(0x9abc, 0xdef0, 0x1234, 0x5678));
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha1su1q_u32() {
let r: u32x4 = vsha1su1q_u32(
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
@@ -336,7 +336,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha1cq_u32() {
let r: u32x4 = vsha1cq_u32(
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
@@ -349,7 +349,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha1pq_u32() {
let r: u32x4 = vsha1pq_u32(
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
@@ -362,7 +362,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha1mq_u32() {
let r: u32x4 = vsha1mq_u32(
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
@@ -375,7 +375,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha256hq_u32() {
let r: u32x4 = vsha256hq_u32(
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
@@ -388,7 +388,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha256h2q_u32() {
let r: u32x4 = vsha256h2q_u32(
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
@@ -401,7 +401,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha256su0q_u32() {
let r: u32x4 = vsha256su0q_u32(
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
@@ -413,7 +413,7 @@ mod tests {
);
}
#[simd_test = "crypto"]
#[simd_test(enable = "crypto")]
unsafe fn test_vsha256su1q_u32() {
let r: u32x4 = vsha256su1q_u32(
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),

100
library/stdarch/coresimd/aarch64/neon.rs
View File

@@ -554,7 +554,7 @@ mod tests {
use std::mem;
use stdsimd_test::simd_test;
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vadd_f64() {
let a = 1.;
let b = 8.;
@@ -564,7 +564,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddq_f64() {
let a = f64x2::new(1., 2.);
let b = f64x2::new(8., 7.);
@@ -573,7 +573,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddd_s64() {
let a = 1_i64;
let b = 8_i64;
@@ -583,7 +583,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddd_u64() {
let a = 1_u64;
let b = 8_u64;
@@ -593,13 +593,13 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxv_s8() {
let r = vmaxv_s8(i8x8::new(1, 2, 3, 4, -8, 6, 7, 5).into_bits());
assert_eq!(r, 7_i8);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxvq_s8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let r = vmaxvq_s8(i8x16::new(
@@ -611,37 +611,37 @@ mod tests {
assert_eq!(r, 8_i8);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxv_s16() {
let r = vmaxv_s16(i16x4::new(1, 2, -4, 3).into_bits());
assert_eq!(r, 3_i16);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxvq_s16() {
let r = vmaxvq_s16(i16x8::new(1, 2, 7, 4, -16, 6, 7, 5).into_bits());
assert_eq!(r, 7_i16);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxv_s32() {
let r = vmaxv_s32(i32x2::new(1, -4).into_bits());
assert_eq!(r, 1_i32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxvq_s32() {
let r = vmaxvq_s32(i32x4::new(1, 2, -32, 4).into_bits());
assert_eq!(r, 4_i32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxv_u8() {
let r = vmaxv_u8(u8x8::new(1, 2, 3, 4, 8, 6, 7, 5).into_bits());
assert_eq!(r, 8_u8);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxvq_u8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let r = vmaxvq_u8(u8x16::new(
@@ -653,55 +653,55 @@ mod tests {
assert_eq!(r, 16_u8);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxv_u16() {
let r = vmaxv_u16(u16x4::new(1, 2, 4, 3).into_bits());
assert_eq!(r, 4_u16);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxvq_u16() {
let r = vmaxvq_u16(u16x8::new(1, 2, 7, 4, 16, 6, 7, 5).into_bits());
assert_eq!(r, 16_u16);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxv_u32() {
let r = vmaxv_u32(u32x2::new(1, 4).into_bits());
assert_eq!(r, 4_u32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxvq_u32() {
let r = vmaxvq_u32(u32x4::new(1, 2, 32, 4).into_bits());
assert_eq!(r, 32_u32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxv_f32() {
let r = vmaxv_f32(f32x2::new(1., 4.).into_bits());
assert_eq!(r, 4_f32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxvq_f32() {
let r = vmaxvq_f32(f32x4::new(1., 2., 32., 4.).into_bits());
assert_eq!(r, 32_f32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmaxvq_f64() {
let r = vmaxvq_f64(f64x2::new(1., 4.).into_bits());
assert_eq!(r, 4_f64);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminv_s8() {
let r = vminv_s8(i8x8::new(1, 2, 3, 4, -8, 6, 7, 5).into_bits());
assert_eq!(r, -8_i8);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminvq_s8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let r = vminvq_s8(i8x16::new(
@@ -713,37 +713,37 @@ mod tests {
assert_eq!(r, -16_i8);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminv_s16() {
let r = vminv_s16(i16x4::new(1, 2, -4, 3).into_bits());
assert_eq!(r, -4_i16);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminvq_s16() {
let r = vminvq_s16(i16x8::new(1, 2, 7, 4, -16, 6, 7, 5).into_bits());
assert_eq!(r, -16_i16);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminv_s32() {
let r = vminv_s32(i32x2::new(1, -4).into_bits());
assert_eq!(r, -4_i32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminvq_s32() {
let r = vminvq_s32(i32x4::new(1, 2, -32, 4).into_bits());
assert_eq!(r, -32_i32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminv_u8() {
let r = vminv_u8(u8x8::new(1, 2, 3, 4, 8, 6, 7, 5).into_bits());
assert_eq!(r, 1_u8);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminvq_u8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let r = vminvq_u8(u8x16::new(
@@ -755,49 +755,49 @@ mod tests {
assert_eq!(r, 1_u8);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminv_u16() {
let r = vminv_u16(u16x4::new(1, 2, 4, 3).into_bits());
assert_eq!(r, 1_u16);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminvq_u16() {
let r = vminvq_u16(u16x8::new(1, 2, 7, 4, 16, 6, 7, 5).into_bits());
assert_eq!(r, 1_u16);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminv_u32() {
let r = vminv_u32(u32x2::new(1, 4).into_bits());
assert_eq!(r, 1_u32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminvq_u32() {
let r = vminvq_u32(u32x4::new(1, 2, 32, 4).into_bits());
assert_eq!(r, 1_u32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminv_f32() {
let r = vminv_f32(f32x2::new(1., 4.).into_bits());
assert_eq!(r, 1_f32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminvq_f32() {
let r = vminvq_f32(f32x4::new(1., 2., 32., 4.).into_bits());
assert_eq!(r, 1_f32);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vminvq_f64() {
let r = vminvq_f64(f64x2::new(1., 4.).into_bits());
assert_eq!(r, 1_f64);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpminq_s8() {
#[cfg_attr(rustfmt, skip)]
let a = i8x16::new(
@@ -818,7 +818,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpminq_s16() {
let a = i16x8::new(1, -2, 3, 4, 5, 6, 7, 8);
let b = i16x8::new(0, 3, 2, 5, 4, 7, 6, 9);
@@ -827,7 +827,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpminq_s32() {
let a = i32x4::new(1, -2, 3, 4);
let b = i32x4::new(0, 3, 2, 5);
@@ -836,7 +836,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpminq_u8() {
#[cfg_attr(rustfmt, skip)]
let a = u8x16::new(
@@ -857,7 +857,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpminq_u16() {
let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let b = u16x8::new(0, 3, 2, 5, 4, 7, 6, 9);
@@ -866,7 +866,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpminq_u32() {
let a = u32x4::new(1, 2, 3, 4);
let b = u32x4::new(0, 3, 2, 5);
@@ -875,7 +875,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_f32() {
let a = f32x4::new(1., -2., 3., 4.);
let b = f32x4::new(0., 3., 2., 5.);
@@ -884,7 +884,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_f64() {
let a = f64x2::new(1., -2.);
let b = f64x2::new(0., 3.);
@@ -893,7 +893,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmaxq_s8() {
#[cfg_attr(rustfmt, skip)]
let a = i8x16::new(
@@ -914,7 +914,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmaxq_s16() {
let a = i16x8::new(1, -2, 3, 4, 5, 6, 7, 8);
let b = i16x8::new(0, 3, 2, 5, 4, 7, 6, 9);
@@ -923,7 +923,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmaxq_s32() {
let a = i32x4::new(1, -2, 3, 4);
let b = i32x4::new(0, 3, 2, 5);
@@ -932,7 +932,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmaxq_u8() {
#[cfg_attr(rustfmt, skip)]
let a = u8x16::new(
@@ -953,7 +953,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmaxq_u16() {
let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let b = u16x8::new(0, 3, 2, 5, 4, 7, 6, 9);
@@ -962,7 +962,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmaxq_u32() {
let a = u32x4::new(1, 2, 3, 4);
let b = u32x4::new(0, 3, 2, 5);
@@ -971,7 +971,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_f32() {
let a = f32x4::new(1., -2., 3., 4.);
let b = f32x4::new(0., 3., 2., 5.);
@@ -980,7 +980,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_f64() {
let a = f64x2::new(1., -2.);
let b = f64x2::new(0., 3.);

94
library/stdarch/coresimd/arm/neon.rs
View File

@@ -924,7 +924,7 @@ mod tests {
use std::mem;
use stdsimd_test::simd_test;
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vadd_s8() {
let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let b = i8x8::new(8, 7, 6, 5, 4, 3, 2, 1);
@@ -933,7 +933,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddq_s8() {
let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8);
let b = i8x16::new(8, 7, 6, 5, 4, 3, 2, 1, 8, 7, 6, 5, 4, 3, 2, 1);
@@ -942,7 +942,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vadd_s16() {
let a = i16x4::new(1, 2, 3, 4);
let b = i16x4::new(8, 7, 6, 5);
@@ -951,7 +951,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddq_s16() {
let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let b = i16x8::new(8, 7, 6, 5, 4, 3, 2, 1);
@@ -960,7 +960,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vadd_s32() {
let a = i32x2::new(1, 2);
let b = i32x2::new(8, 7);
@@ -969,7 +969,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddq_s32() {
let a = i32x4::new(1, 2, 3, 4);
let b = i32x4::new(8, 7, 6, 5);
@@ -978,7 +978,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vadd_u8() {
let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let b = u8x8::new(8, 7, 6, 5, 4, 3, 2, 1);
@@ -987,7 +987,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddq_u8() {
let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8);
let b = u8x16::new(8, 7, 6, 5, 4, 3, 2, 1, 8, 7, 6, 5, 4, 3, 2, 1);
@@ -996,7 +996,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vadd_u16() {
let a = u16x4::new(1, 2, 3, 4);
let b = u16x4::new(8, 7, 6, 5);
@@ -1005,7 +1005,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddq_u16() {
let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let b = u16x8::new(8, 7, 6, 5, 4, 3, 2, 1);
@@ -1014,7 +1014,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vadd_u32() {
let a = u32x2::new(1, 2);
let b = u32x2::new(8, 7);
@@ -1023,7 +1023,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddq_u32() {
let a = u32x4::new(1, 2, 3, 4);
let b = u32x4::new(8, 7, 6, 5);
@@ -1032,7 +1032,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vadd_f32() {
let a = f32x2::new(1., 2.);
let b = f32x2::new(8., 7.);
@@ -1041,7 +1041,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddq_f32() {
let a = f32x4::new(1., 2., 3., 4.);
let b = f32x4::new(8., 7., 6., 5.);
@@ -1050,7 +1050,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddl_s8() {
let v = ::std::i8::MAX;
let a = i8x8::new(v, v, v, v, v, v, v, v);
@@ -1060,7 +1060,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddl_s16() {
let v = ::std::i16::MAX;
let a = i16x4::new(v, v, v, v);
@@ -1070,7 +1070,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddl_s32() {
let v = ::std::i32::MAX;
let a = i32x2::new(v, v);
@@ -1080,7 +1080,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddl_u8() {
let v = ::std::u8::MAX;
let a = u8x8::new(v, v, v, v, v, v, v, v);
@@ -1090,7 +1090,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddl_u16() {
let v = ::std::u16::MAX;
let a = u16x4::new(v, v, v, v);
@@ -1100,7 +1100,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vaddl_u32() {
let v = ::std::u32::MAX;
let a = u32x2::new(v, v);
@@ -1110,7 +1110,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovn_s16() {
let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let e = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
@@ -1118,7 +1118,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovn_s32() {
let a = i32x4::new(1, 2, 3, 4);
let e = i16x4::new(1, 2, 3, 4);
@@ -1126,7 +1126,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovn_s64() {
let a = i64x2::new(1, 2);
let e = i32x2::new(1, 2);
@@ -1134,7 +1134,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovn_u16() {
let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
@@ -1142,7 +1142,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovn_u32() {
let a = u32x4::new(1, 2, 3, 4);
let e = u16x4::new(1, 2, 3, 4);
@@ -1150,7 +1150,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovn_u64() {
let a = u64x2::new(1, 2);
let e = u32x2::new(1, 2);
@@ -1158,7 +1158,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovl_s8() {
let e = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
@@ -1166,7 +1166,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovl_s16() {
let e = i32x4::new(1, 2, 3, 4);
let a = i16x4::new(1, 2, 3, 4);
@@ -1174,7 +1174,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovl_s32() {
let e = i64x2::new(1, 2);
let a = i32x2::new(1, 2);
@@ -1182,7 +1182,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovl_u8() {
let e = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
@@ -1190,7 +1190,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovl_u16() {
let e = u32x4::new(1, 2, 3, 4);
let a = u16x4::new(1, 2, 3, 4);
@@ -1198,7 +1198,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vmovl_u32() {
let e = u64x2::new(1, 2);
let a = u32x2::new(1, 2);
@@ -1206,7 +1206,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vrsqrt_f32() {
let a = f32x2::new(1.0, 2.0);
let e = f32x2::new(0.9980469, 0.7050781);
@@ -1214,7 +1214,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_s8() {
let a = i8x8::new(1, -2, 3, -4, 5, 6, 7, 8);
let b = i8x8::new(0, 3, 2, 5, 4, 7, 6, 9);
@@ -1223,7 +1223,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_s16() {
let a = i16x4::new(1, 2, 3, -4);
let b = i16x4::new(0, 3, 2, 5);
@@ -1232,7 +1232,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_s32() {
let a = i32x2::new(1, -2);
let b = i32x2::new(0, 3);
@@ -1241,7 +1241,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_u8() {
let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let b = u8x8::new(0, 3, 2, 5, 4, 7, 6, 9);
@@ -1250,7 +1250,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_u16() {
let a = u16x4::new(1, 2, 3, 4);
let b = u16x4::new(0, 3, 2, 5);
@@ -1259,7 +1259,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_u32() {
let a = u32x2::new(1, 2);
let b = u32x2::new(0, 3);
@@ -1268,7 +1268,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmin_f32() {
let a = f32x2::new(1., -2.);
let b = f32x2::new(0., 3.);
@@ -1277,7 +1277,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_s8() {
let a = i8x8::new(1, -2, 3, -4, 5, 6, 7, 8);
let b = i8x8::new(0, 3, 2, 5, 4, 7, 6, 9);
@@ -1286,7 +1286,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_s16() {
let a = i16x4::new(1, 2, 3, -4);
let b = i16x4::new(0, 3, 2, 5);
@@ -1295,7 +1295,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_s32() {
let a = i32x2::new(1, -2);
let b = i32x2::new(0, 3);
@@ -1304,7 +1304,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_u8() {
let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let b = u8x8::new(0, 3, 2, 5, 4, 7, 6, 9);
@@ -1313,7 +1313,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_u16() {
let a = u16x4::new(1, 2, 3, 4);
let b = u16x4::new(0, 3, 2, 5);
@@ -1322,7 +1322,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_u32() {
let a = u32x2::new(1, 2);
let b = u32x2::new(0, 3);
@@ -1331,7 +1331,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "neon"]
#[simd_test(enable = "neon")]
unsafe fn test_vpmax_f32() {
let a = f32x2::new(1., -2.);
let b = f32x2::new(0., 3.);

2
library/stdarch/coresimd/mips/msa.rs
View File

@@ -32,7 +32,7 @@ mod tests {
use simd::*;
use stdsimd_test::simd_test;
#[simd_test = "msa"]
#[simd_test(enable = "msa")]
unsafe fn __msa_add_a_b() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = i8x16::new(

8
library/stdarch/coresimd/ppsv/api/load_store.rs
View File

@@ -12,7 +12,6 @@ macro_rules! impl_load_store {
/// aligned to an `align_of::<Self>()` boundary.
#[inline]
pub fn store_aligned(self, slice: &mut [$elem_ty]) {
use slice::SliceExt;
unsafe {
assert!(slice.len() >= $elem_count);
let target_ptr =
@@ -32,7 +31,6 @@ macro_rules! impl_load_store {
/// If `slice.len() < Self::lanes()`.
#[inline]
pub fn store_unaligned(self, slice: &mut [$elem_ty]) {
use slice::SliceExt;
unsafe {
assert!(slice.len() >= $elem_count);
self.store_unaligned_unchecked(slice);
@@ -50,7 +48,6 @@ macro_rules! impl_load_store {
pub unsafe fn store_aligned_unchecked(
self, slice: &mut [$elem_ty]
) {
use slice::SliceExt;
*(slice.get_unchecked_mut(0) as *mut $elem_ty as *mut Self) =
self;
}
@@ -64,7 +61,6 @@ macro_rules! impl_load_store {
pub unsafe fn store_unaligned_unchecked(
self, slice: &mut [$elem_ty]
) {
use slice::SliceExt;
let target_ptr =
slice.get_unchecked_mut(0) as *mut $elem_ty as *mut u8;
let self_ptr = &self as *const Self as *const u8;
@@ -84,7 +80,6 @@ macro_rules! impl_load_store {
#[inline]
pub fn load_aligned(slice: &[$elem_ty]) -> Self {
unsafe {
use slice::SliceExt;
assert!(slice.len() >= $elem_count);
let target_ptr = slice.get_unchecked(0) as *const $elem_ty;
assert!(
@@ -102,7 +97,6 @@ macro_rules! impl_load_store {
/// If `slice.len() < Self::lanes()`.
#[inline]
pub fn load_unaligned(slice: &[$elem_ty]) -> Self {
use slice::SliceExt;
unsafe {
assert!(slice.len() >= $elem_count);
Self::load_unaligned_unchecked(slice)
@@ -117,7 +111,6 @@ macro_rules! impl_load_store {
/// to an `align_of::<Self>()` boundary, the behavior is undefined.
#[inline]
pub unsafe fn load_aligned_unchecked(slice: &[$elem_ty]) -> Self {
use slice::SliceExt;
*(slice.get_unchecked(0) as *const $elem_ty as *const Self)
}
@@ -131,7 +124,6 @@ macro_rules! impl_load_store {
slice: &[$elem_ty]
) -> Self {
use mem::size_of;
use slice::SliceExt;
let target_ptr =
slice.get_unchecked(0) as *const $elem_ty as *const u8;
let mut x = Self::splat(0 as $elem_ty);

1
library/stdarch/coresimd/ppsv/api/minmax.rs
View File

@@ -94,7 +94,6 @@ macro_rules! impl_float_minmax_ops {
// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/416
// use coresimd::simd_llvm::simd_fmax;
// unsafe { simd_fmax(self, x) }
use num::Float;
let mut r = self;
for i in 0..$id::lanes() {
let a = self.extract(i);

2
library/stdarch/coresimd/ppsv/api/minmax_reductions.rs
View File

@@ -20,7 +20,6 @@ macro_rules! impl_minmax_reductions {
// FIXME: broken on AArch64
// https://bugs.llvm.org/show_bug.cgi?id=36796
use cmp::Ord;
use num::Float;
let mut x = self.extract(0);
for i in 1..$id::lanes() {
x = x.max(self.extract(i));
@@ -44,7 +43,6 @@ macro_rules! impl_minmax_reductions {
// FIXME: broken on AArch64
// https://bugs.llvm.org/show_bug.cgi?id=36796
use cmp::Ord;
use num::Float;
let mut x = self.extract(0);
for i in 1..$id::lanes() {
x = x.min(self.extract(i));

4
library/stdarch/coresimd/x86/abm.rs
View File

@@ -50,12 +50,12 @@ mod tests {
use coresimd::x86::*;
#[simd_test = "lzcnt"]
#[simd_test(enable = "lzcnt")]
unsafe fn test_lzcnt_u32() {
assert_eq!(_lzcnt_u32(0b0101_1010), 25);
}
#[simd_test = "popcnt"]
#[simd_test(enable = "popcnt")]
unsafe fn test_popcnt32() {
assert_eq!(_popcnt32(0b0101_1010), 4);
}

12
library/stdarch/coresimd/x86/aes.rs
View File

@@ -115,7 +115,7 @@ mod tests {
use coresimd::x86::*;
#[simd_test = "aes"]
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesdec_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664949.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
@@ -125,7 +125,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "aes"]
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesdeclast_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714178.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
@@ -135,7 +135,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "aes"]
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesenc_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664810.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
@@ -145,7 +145,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "aes"]
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesenclast_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714136.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
@@ -155,7 +155,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "aes"]
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesimc_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714195.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
@@ -164,7 +164,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "aes"]
#[simd_test(enable = "aes")]
unsafe fn test_mm_aeskeygenassist_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714138.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);

356
library/stdarch/coresimd/x86/avx.rs
View File

File diff suppressed because it is too large Load Diff

396
library/stdarch/coresimd/x86/avx2.rs
View File

File diff suppressed because it is too large Load Diff

12
library/stdarch/coresimd/x86/bmi1.rs
View File

@@ -125,13 +125,13 @@ mod tests {
use coresimd::x86::*;
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_bextr_u32() {
let r = _bextr_u32(0b0101_0000u32, 4, 4);
assert_eq!(r, 0b0000_0101u32);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_andn_u32() {
assert_eq!(_andn_u32(0, 0), 0);
assert_eq!(_andn_u32(0, 1), 1);
@@ -154,25 +154,25 @@ mod tests {
assert_eq!(r, 0b0001_1101u32);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_blsi_u32() {
assert_eq!(_blsi_u32(0b1101_0000u32), 0b0001_0000u32);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_blsmsk_u32() {
let r = _blsmsk_u32(0b0011_0000u32);
assert_eq!(r, 0b0001_1111u32);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_blsr_u32() {
// TODO: test the behavior when the input is 0
let r = _blsr_u32(0b0011_0000u32);
assert_eq!(r, 0b0010_0000u32);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_tzcnt_u32() {
assert_eq!(_tzcnt_u32(0b0000_0001u32), 0u32);
assert_eq!(_tzcnt_u32(0b0000_0000u32), 32u32);

8
library/stdarch/coresimd/x86/bmi2.rs
View File

@@ -81,7 +81,7 @@ mod tests {
use coresimd::x86::*;
#[simd_test = "bmi2"]
#[simd_test(enable = "bmi2")]
unsafe fn test_pext_u32() {
let n = 0b1011_1110_1001_0011u32;
@@ -95,7 +95,7 @@ mod tests {
assert_eq!(_pext_u32(n, m1), s1);
}
#[simd_test = "bmi2"]
#[simd_test(enable = "bmi2")]
unsafe fn test_pdep_u32() {
let n = 0b1011_1110_1001_0011u32;
@@ -109,14 +109,14 @@ mod tests {
assert_eq!(_pdep_u32(n, m1), s1);
}
#[simd_test = "bmi2"]
#[simd_test(enable = "bmi2")]
unsafe fn test_bzhi_u32() {
let n = 0b1111_0010u32;
let s = 0b0001_0010u32;
assert_eq!(_bzhi_u32(n, 5), s);
}
#[simd_test = "bmi2"]
#[simd_test(enable = "bmi2")]
unsafe fn test_mulx_u32() {
let a: u32 = 4_294_967_200;
let b: u32 = 2;

2
library/stdarch/coresimd/x86/fxsr.rs
View File

@@ -99,7 +99,7 @@ mod tests {
}
}
#[simd_test = "fxsr"]
#[simd_test(enable = "fxsr")]
unsafe fn fxsave() {
let mut a = FxsaveArea::new();
let mut b = FxsaveArea::new();

52
library/stdarch/coresimd/x86/mmx.rs
View File

@@ -490,13 +490,13 @@ mod tests {
use coresimd::x86::*;
use stdsimd_test::simd_test;
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_setzero_si64() {
let r: __m64 = ::std::mem::transmute(0_i64);
assert_eq_m64(r, _mm_setzero_si64());
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_add_pi8() {
let a = _mm_setr_pi8(-1, -1, 1, 1, -1, 0, 1, 0);
let b = _mm_setr_pi8(-127, 101, 99, 126, 0, -1, 0, 1);
@@ -505,7 +505,7 @@ mod tests {
assert_eq_m64(e, _m_paddb(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_add_pi16() {
let a = _mm_setr_pi16(-1, -1, 1, 1);
let b = _mm_setr_pi16(
@@ -524,7 +524,7 @@ mod tests {
assert_eq_m64(e, _m_paddw(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_add_pi32() {
let a = _mm_setr_pi32(1, -1);
let b = _mm_setr_pi32(i32::max_value() - 1, i32::min_value() + 1);
@@ -533,7 +533,7 @@ mod tests {
assert_eq_m64(e, _m_paddd(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_adds_pi8() {
let a = _mm_setr_pi8(-100, -1, 1, 100, -1, 0, 1, 0);
let b = _mm_setr_pi8(-100, 1, -1, 100, 0, -1, 0, 1);
@@ -551,7 +551,7 @@ mod tests {
assert_eq_m64(e, _m_paddsb(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_adds_pi16() {
let a = _mm_setr_pi16(-32000, 32000, 4, 0);
let b = _mm_setr_pi16(-32000, 32000, -5, 1);
@@ -560,7 +560,7 @@ mod tests {
assert_eq_m64(e, _m_paddsw(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_adds_pu8() {
let a = _mm_setr_pi8(0, 1, 2, 3, 4, 5, 6, 200u8 as i8);
let b = _mm_setr_pi8(0, 10, 20, 30, 40, 50, 60, 200u8 as i8);
@@ -569,7 +569,7 @@ mod tests {
assert_eq_m64(e, _m_paddusb(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_adds_pu16() {
let a = _mm_setr_pi16(0, 1, 2, 60000u16 as i16);
let b = _mm_setr_pi16(0, 10, 20, 60000u16 as i16);
@@ -578,7 +578,7 @@ mod tests {
assert_eq_m64(e, _m_paddusw(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_sub_pi8() {
let a = _mm_setr_pi8(0, 0, 1, 1, -1, -1, 0, 0);
let b = _mm_setr_pi8(-1, 1, -2, 2, 100, -100, -127, 127);
@@ -587,7 +587,7 @@ mod tests {
assert_eq_m64(e, _m_psubb(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_sub_pi16() {
let a = _mm_setr_pi16(-20000, -20000, 20000, 30000);
let b = _mm_setr_pi16(-10000, 10000, -10000, 30000);
@@ -596,7 +596,7 @@ mod tests {
assert_eq_m64(e, _m_psubw(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_sub_pi32() {
let a = _mm_setr_pi32(500_000, -500_000);
let b = _mm_setr_pi32(500_000, 500_000);
@@ -605,7 +605,7 @@ mod tests {
assert_eq_m64(e, _m_psubd(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_subs_pi8() {
let a = _mm_setr_pi8(-100, 100, 0, 0, 0, 0, -5, 5);
let b = _mm_setr_pi8(100, -100, i8::min_value(), 127, -1, 1, 3, -3);
@@ -623,7 +623,7 @@ mod tests {
assert_eq_m64(e, _m_psubsb(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_subs_pi16() {
let a = _mm_setr_pi16(-20000, 20000, 0, 0);
let b = _mm_setr_pi16(20000, -20000, -1, 1);
@@ -632,7 +632,7 @@ mod tests {
assert_eq_m64(e, _m_psubsw(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_subs_pu8() {
let a = _mm_setr_pi8(50, 10, 20, 30, 40, 60, 70, 80);
let b = _mm_setr_pi8(60, 20, 30, 40, 30, 20, 10, 0);
@@ -641,7 +641,7 @@ mod tests {
assert_eq_m64(e, _m_psubusb(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_subs_pu16() {
let a = _mm_setr_pi16(10000, 200, 0, 44444u16 as i16);
let b = _mm_setr_pi16(20000, 300, 1, 11111);
@@ -650,7 +650,7 @@ mod tests {
assert_eq_m64(e, _m_psubusw(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_packs_pi16() {
let a = _mm_setr_pi16(-1, 2, -3, 4);
let b = _mm_setr_pi16(-5, 6, -7, 8);
@@ -658,7 +658,7 @@ mod tests {
assert_eq_m64(r, _mm_packs_pi16(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_packs_pi32() {
let a = _mm_setr_pi32(-1, 2);
let b = _mm_setr_pi32(-5, 6);
@@ -666,7 +666,7 @@ mod tests {
assert_eq_m64(r, _mm_packs_pi32(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_cmpgt_pi8() {
let a = _mm_setr_pi8(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_setr_pi8(8, 7, 6, 5, 4, 3, 2, 1);
@@ -674,7 +674,7 @@ mod tests {
assert_eq_m64(r, _mm_cmpgt_pi8(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_cmpgt_pi16() {
let a = _mm_setr_pi16(0, 1, 2, 3);
let b = _mm_setr_pi16(4, 3, 2, 1);
@@ -682,7 +682,7 @@ mod tests {
assert_eq_m64(r, _mm_cmpgt_pi16(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_cmpgt_pi32() {
let a = _mm_setr_pi32(0, 3);
let b = _mm_setr_pi32(1, 2);
@@ -693,7 +693,7 @@ mod tests {
assert_eq_m64(r1, _mm_cmpgt_pi32(b, a));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_unpackhi_pi8() {
let a = _mm_setr_pi8(0, 3, 4, 7, 8, 11, 12, 15);
let b = _mm_setr_pi8(1, 2, 5, 6, 9, 10, 13, 14);
@@ -702,7 +702,7 @@ mod tests {
assert_eq_m64(r, _mm_unpackhi_pi8(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_unpacklo_pi8() {
let a = _mm_setr_pi8(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_setr_pi8(8, 9, 10, 11, 12, 13, 14, 15);
@@ -710,7 +710,7 @@ mod tests {
assert_eq_m64(r, _mm_unpacklo_pi8(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_unpackhi_pi16() {
let a = _mm_setr_pi16(0, 1, 2, 3);
let b = _mm_setr_pi16(4, 5, 6, 7);
@@ -718,7 +718,7 @@ mod tests {
assert_eq_m64(r, _mm_unpackhi_pi16(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_unpacklo_pi16() {
let a = _mm_setr_pi16(0, 1, 2, 3);
let b = _mm_setr_pi16(4, 5, 6, 7);
@@ -726,7 +726,7 @@ mod tests {
assert_eq_m64(r, _mm_unpacklo_pi16(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_unpackhi_pi32() {
let a = _mm_setr_pi32(0, 3);
let b = _mm_setr_pi32(1, 2);
@@ -735,7 +735,7 @@ mod tests {
assert_eq_m64(r, _mm_unpackhi_pi32(a, b));
}
#[simd_test = "mmx"]
#[simd_test(enable = "mmx")]
unsafe fn test_mm_unpacklo_pi32() {
let a = _mm_setr_pi32(0, 3);
let b = _mm_setr_pi32(1, 2);

24
library/stdarch/coresimd/x86/mod.rs
View File

@@ -33,9 +33,7 @@ types! {
/// # Examples
///
/// ```
/// # #![feature(stdsimd)]
/// # #![cfg_attr(dox, feature(mmx_target_feature))]
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature))]
/// # #![feature(stdsimd, mmx_target_feature)]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
/// # extern crate std as real_std;
@@ -85,7 +83,7 @@ types! {
/// # Examples
///
/// ```
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]
/// # #![cfg_attr(not(dox), feature(stdsimd))]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
/// # extern crate std as real_std;
@@ -129,7 +127,7 @@ types! {
/// # Examples
///
/// ```
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]
/// # #![cfg_attr(not(dox), feature(stdsimd))]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
/// # extern crate std as real_std;
@@ -173,7 +171,7 @@ types! {
/// # Examples
///
/// ```
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]
/// # #![cfg_attr(not(dox), feature(stdsimd))]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
/// # extern crate std as real_std;
@@ -221,7 +219,7 @@ types! {
/// # Examples
///
/// ```
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]
/// # #![cfg_attr(not(dox), feature(stdsimd))]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
/// # extern crate std as real_std;
@@ -265,7 +263,7 @@ types! {
/// # Examples
///
/// ```
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]
/// # #![cfg_attr(not(dox), feature(stdsimd))]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
/// # extern crate std as real_std;
@@ -309,7 +307,7 @@ types! {
/// # Examples
///
/// ```
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]
/// # #![cfg_attr(not(dox), feature(stdsimd))]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
/// # extern crate std as real_std;
@@ -606,14 +604,14 @@ pub use self::bmi1::*;
mod bmi2;
pub use self::bmi2::*;
#[cfg(not(feature = "intel_sde"))]
#[cfg(not(stdsimd_intel_sde))]
mod sse4a;
#[cfg(not(feature = "intel_sde"))]
#[cfg(not(stdsimd_intel_sde))]
pub use self::sse4a::*;
#[cfg(not(feature = "intel_sde"))]
#[cfg(not(stdsimd_intel_sde))]
mod tbm;
#[cfg(not(feature = "intel_sde"))]
#[cfg(not(stdsimd_intel_sde))]
pub use self::tbm::*;
mod mmx;

2
library/stdarch/coresimd/x86/pclmulqdq.rs
View File

@@ -59,7 +59,7 @@ mod tests {
use coresimd::x86::*;
#[simd_test = "pclmulqdq"]
#[simd_test(enable = "pclmulqdq")]
unsafe fn test_mm_clmulepi64_si128() {
// Constants taken from https://software.intel.com/sites/default/files/managed/72/cc/clmul-wp-rev-2.02-2014-04-20.pdf
let a = _mm_set_epi64x(0x7b5b546573745665, 0x63746f725d53475d);

1
library/stdarch/coresimd/x86/rdrand.rs
View File

@@ -1,3 +1,4 @@
//! RDRAND and RDSEED instructions for returning random numbers from an Intel
//! on-chip hardware random number generator which has been seeded by an
//! on-chip entropy source.

4
library/stdarch/coresimd/x86/rdtsc.rs
View File

@@ -62,13 +62,13 @@ mod tests {
use coresimd::x86::rdtsc;
use stdsimd_test::simd_test;
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn _rdtsc() {
let r = rdtsc::_rdtsc();
assert_ne!(r, 0); // The chances of this being 0 are infinitesimal
}
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn _rdtscp() {
let mut aux = 0;
let r = rdtsc::__rdtscp(&mut aux);

14
library/stdarch/coresimd/x86/sha.rs
View File

@@ -147,7 +147,7 @@ mod tests {
use stdsimd_test::simd_test;
use test::black_box; // Used to inhibit constant-folding.
#[simd_test = "sha"]
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha1msg1_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
@@ -157,7 +157,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "sha"]
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha1msg2_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
@@ -167,7 +167,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "sha"]
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha1nexte_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
@@ -177,7 +177,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "sha"]
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha1rnds4_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
@@ -199,7 +199,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "sha"]
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha256msg1_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
@@ -209,7 +209,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "sha"]
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha256msg2_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
@@ -219,7 +219,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "sha"]
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha256rnds2_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);

240
library/stdarch/coresimd/x86/sse.rs
View File

@@ -1096,7 +1096,6 @@ pub unsafe fn _mm_movemask_ps(a: __m128) -> i32 {
/// This corresponds to the `MOVHPS` / `MOVHPD` / `VMOVHPD` instructions.
///
/// ```rust
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature))]
/// # #![feature(stdsimd)]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
@@ -1152,7 +1151,6 @@ pub unsafe fn _mm_loadh_pi(a: __m128, p: *const __m64) -> __m128 {
/// This corresponds to the `MOVLPS` / `MOVLDP` / `VMOVLDP` instructions.
///
/// ```rust
/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature))]
/// # #![feature(stdsimd)]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
@@ -2525,7 +2523,7 @@ mod tests {
use coresimd::simd::*;
use coresimd::x86::*;
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_add_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2533,7 +2531,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(-101.0, 25.0, 0.0, -15.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_add_ss() {
let a = _mm_set_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_set_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2541,7 +2539,7 @@ mod tests {
assert_eq_m128(r, _mm_set_ps(-1.0, 5.0, 0.0, -15.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_sub_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2549,7 +2547,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(99.0, -15.0, 0.0, -5.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_sub_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2557,7 +2555,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(99.0, 5.0, 0.0, -10.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_mul_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2565,7 +2563,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(100.0, 100.0, 0.0, 50.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_mul_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2573,7 +2571,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(100.0, 5.0, 0.0, -10.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_div_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 2.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.2, -5.0);
@@ -2581,7 +2579,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(0.01, 0.25, 10.0, 2.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_div_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2589,7 +2587,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(0.01, 5.0, 0.0, -10.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_sqrt_ss() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_sqrt_ss(a);
@@ -2597,7 +2595,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_sqrt_ps() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_sqrt_ps(a);
@@ -2605,7 +2603,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_rcp_ss() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_rcp_ss(a);
@@ -2613,7 +2611,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_rcp_ps() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_rcp_ps(a);
@@ -2624,7 +2622,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_rsqrt_ss() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_rsqrt_ss(a);
@@ -2635,7 +2633,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_rsqrt_ps() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_rsqrt_ps(a);
@@ -2646,7 +2644,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_min_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2654,7 +2652,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(-100.0, 5.0, 0.0, -10.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_min_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2662,7 +2660,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(-100.0, 5.0, 0.0, -10.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_max_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2670,7 +2668,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(-1.0, 5.0, 0.0, -10.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_max_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -2678,7 +2676,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(-1.0, 20.0, 0.0, -5.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_and_ps() {
let a = transmute(u32x4::splat(0b0011));
let b = transmute(u32x4::splat(0b0101));
@@ -2687,7 +2685,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_andnot_ps() {
let a = transmute(u32x4::splat(0b0011));
let b = transmute(u32x4::splat(0b0101));
@@ -2696,7 +2694,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_or_ps() {
let a = transmute(u32x4::splat(0b0011));
let b = transmute(u32x4::splat(0b0101));
@@ -2705,7 +2703,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_xor_ps() {
let a = transmute(u32x4::splat(0b0011));
let b = transmute(u32x4::splat(0b0101));
@@ -2714,7 +2712,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpeq_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(-1.0, 5.0, 6.0, 7.0);
@@ -2733,7 +2731,7 @@ mod tests {
assert_eq!(r2, e2);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmplt_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(0.0, 5.0, 6.0, 7.0);
@@ -2757,7 +2755,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmple_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(0.0, 5.0, 6.0, 7.0);
@@ -2781,7 +2779,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpgt_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(0.0, 5.0, 6.0, 7.0);
@@ -2805,7 +2803,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpge_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(0.0, 5.0, 6.0, 7.0);
@@ -2829,7 +2827,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpneq_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(0.0, 5.0, 6.0, 7.0);
@@ -2853,7 +2851,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpnlt_ss() {
// TODO: This test is exactly the same as for _mm_cmpge_ss, but there
// must be a difference. It may have to do with behavior in the
@@ -2882,7 +2880,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpnle_ss() {
// TODO: This test is exactly the same as for _mm_cmpgt_ss, but there
// must be a difference. It may have to do with behavior in the
@@ -2911,7 +2909,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpngt_ss() {
// TODO: This test is exactly the same as for _mm_cmple_ss, but there
// must be a difference. It may have to do with behavior in the
@@ -2940,7 +2938,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpnge_ss() {
// TODO: This test is exactly the same as for _mm_cmplt_ss, but there
// must be a difference. It may have to do with behavior in the
@@ -2969,7 +2967,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpord_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(0.0, 5.0, 6.0, 7.0);
@@ -2993,7 +2991,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpunord_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(0.0, 5.0, 6.0, 7.0);
@@ -3017,7 +3015,7 @@ mod tests {
assert_eq!(rd, ed);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpeq_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, NAN);
@@ -3029,7 +3027,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmplt_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, NAN);
@@ -3041,7 +3039,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmple_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, 4.0);
let b = _mm_setr_ps(15.0, 20.0, 1.0, NAN);
@@ -3053,7 +3051,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpgt_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, 42.0);
@@ -3065,7 +3063,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpge_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, 42.0);
@@ -3077,7 +3075,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpneq_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, NAN);
@@ -3089,7 +3087,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpnlt_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, 5.0);
@@ -3101,7 +3099,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpnle_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, 5.0);
@@ -3113,7 +3111,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpngt_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, 5.0);
@@ -3125,7 +3123,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpnge_ps() {
let a = _mm_setr_ps(10.0, 50.0, 1.0, NAN);
let b = _mm_setr_ps(15.0, 20.0, 1.0, 5.0);
@@ -3137,7 +3135,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpord_ps() {
let a = _mm_setr_ps(10.0, 50.0, NAN, NAN);
let b = _mm_setr_ps(15.0, NAN, 1.0, NAN);
@@ -3149,7 +3147,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cmpunord_ps() {
let a = _mm_setr_ps(10.0, 50.0, NAN, NAN);
let b = _mm_setr_ps(15.0, NAN, 1.0, NAN);
@@ -3161,7 +3159,7 @@ mod tests {
assert_eq!(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_comieq_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3182,7 +3180,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_comilt_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3203,7 +3201,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_comile_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3224,7 +3222,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_comigt_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3245,7 +3243,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_comineq_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3266,7 +3264,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomieq_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3287,7 +3285,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomilt_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3308,7 +3306,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomile_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3329,7 +3327,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomigt_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3350,7 +3348,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomige_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3371,7 +3369,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomineq_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@@ -3392,7 +3390,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_comieq_ss_vs_ucomieq_ss() {
// If one of the arguments is a quiet NaN `comieq_ss` should signal an
// Invalid Operation Exception while `ucomieq_ss` should not.
@@ -3441,7 +3439,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvtss_si32() {
let inputs = &[
42.0f32,
@@ -3471,7 +3469,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvttss_si32() {
let inputs = &[
(42.0f32, 42i32),
@@ -3497,7 +3495,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
pub unsafe fn test_mm_cvtsi32_ss() {
let inputs = &[
(4555i32, 4555.0f32),
@@ -3515,19 +3513,19 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
pub unsafe fn test_mm_cvtss_f32() {
let a = _mm_setr_ps(312.0134, 5.0, 6.0, 7.0);
assert_eq!(_mm_cvtss_f32(a), 312.0134);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_set_ss() {
let r = _mm_set_ss(black_box(4.25));
assert_eq_m128(r, _mm_setr_ps(4.25, 0.0, 0.0, 0.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_set1_ps() {
let r1 = _mm_set1_ps(black_box(4.25));
let r2 = _mm_set_ps1(black_box(4.25));
@@ -3541,7 +3539,7 @@ mod tests {
assert_eq!(get_m128(r2, 3), 4.25);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_set_ps() {
let r = _mm_set_ps(
black_box(1.0),
@@ -3555,7 +3553,7 @@ mod tests {
assert_eq!(get_m128(r, 3), 1.0);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_setr_ps() {
let r = _mm_setr_ps(
black_box(1.0),
@@ -3566,13 +3564,13 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(1.0, 2.0, 3.0, 4.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_setzero_ps() {
let r = *black_box(&_mm_setzero_ps());
assert_eq_m128(r, _mm_set1_ps(0.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_shuffle_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
@@ -3580,7 +3578,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(4.0, 2.0, 6.0, 5.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_unpackhi_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
@@ -3588,7 +3586,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(3.0, 7.0, 4.0, 8.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_unpacklo_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
@@ -3596,7 +3594,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(1.0, 5.0, 2.0, 6.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_movehl_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
@@ -3604,7 +3602,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(7.0, 8.0, 3.0, 4.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_movelh_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
@@ -3612,7 +3610,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(1.0, 2.0, 5.0, 6.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_loadh_pi() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let x: [f32; 4] = [5.0, 6.0, 7.0, 8.0];
@@ -3621,7 +3619,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(1.0, 2.0, 5.0, 6.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_loadl_pi() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let x: [f32; 4] = [5.0, 6.0, 7.0, 8.0];
@@ -3630,21 +3628,21 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(5.0, 6.0, 3.0, 4.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_load_ss() {
let a = 42.0f32;
let r = _mm_load_ss(&a as *const f32);
assert_eq_m128(r, _mm_setr_ps(42.0, 0.0, 0.0, 0.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_load1_ps() {
let a = 42.0f32;
let r = _mm_load1_ps(&a as *const f32);
assert_eq_m128(r, _mm_setr_ps(42.0, 42.0, 42.0, 42.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_load_ps() {
let vals = &[1.0f32, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0];
@@ -3669,7 +3667,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_loadu_ps() {
let vals = &[1.0f32, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0];
let p = vals.as_ptr().offset(3);
@@ -3677,7 +3675,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(4.0, 5.0, 6.0, 7.0));
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_loadr_ps() {
let vals = &[1.0f32, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0];
@@ -3702,7 +3700,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_storeh_pi() {
let mut vals = [0.0f32; 8];
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@@ -3713,7 +3711,7 @@ mod tests {
assert_eq!(vals[2], 0.0);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_storel_pi() {
let mut vals = [0.0f32; 8];
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@@ -3724,7 +3722,7 @@ mod tests {
assert_eq!(vals[2], 0.0);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_store_ss() {
let mut vals = [0.0f32; 8];
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@@ -3735,7 +3733,7 @@ mod tests {
assert_eq!(vals[2], 0.0);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_store1_ps() {
let mut vals = [0.0f32; 8];
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@@ -3760,7 +3758,7 @@ mod tests {
assert_eq!(vals[ofs + 4], 0.0);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_store_ps() {
let mut vals = [0.0f32; 8];
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@@ -3786,7 +3784,7 @@ mod tests {
assert_eq!(vals[ofs + 4], 0.0);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_storer_ps() {
let mut vals = [0.0f32; 8];
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@@ -3812,7 +3810,7 @@ mod tests {
assert_eq!(vals[ofs + 4], 0.0);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_storeu_ps() {
let mut vals = [0.0f32; 8];
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@@ -3838,7 +3836,7 @@ mod tests {
assert_eq!(vals[ofs + 4], 0.0);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_move_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
@@ -3848,7 +3846,7 @@ mod tests {
assert_eq_m128(e, r);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_movemask_ps() {
let r = _mm_movemask_ps(_mm_setr_ps(-1.0, 5.0, -5.0, 0.0));
assert_eq!(r, 0b0101);
@@ -3857,12 +3855,12 @@ mod tests {
assert_eq!(r, 0b0111);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_sfence() {
_mm_sfence();
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_getcsr_setcsr_1() {
let saved_csr = _mm_getcsr();
@@ -3878,7 +3876,7 @@ mod tests {
assert_eq_m128(r, exp); // first component is a denormalized f32
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_getcsr_setcsr_2() {
// Same as _mm_setcsr_1 test, but with opposite flag value.
@@ -3896,7 +3894,7 @@ mod tests {
assert_eq_m128(r, exp); // first component is a denormalized f32
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_getcsr_setcsr_underflow() {
_MM_SET_EXCEPTION_STATE(0);
@@ -3914,7 +3912,7 @@ mod tests {
assert_eq!(underflow, true);
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_MM_TRANSPOSE4_PS() {
let mut a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let mut b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
@@ -3934,7 +3932,7 @@ mod tests {
pub data: [f32; 4],
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_stream_ps() {
let a = _mm_set1_ps(7.0);
let mut mem = Memory {
@@ -3947,7 +3945,7 @@ mod tests {
}
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_stream_pi() {
let a = transmute(i8x8::new(0, 0, 0, 0, 0, 0, 0, 7));
let mut mem =
@@ -3956,7 +3954,7 @@ mod tests {
assert_eq_m64(a, *mem);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_max_pi16() {
let a = _mm_setr_pi16(-1, 6, -3, 8);
let b = _mm_setr_pi16(5, -2, 7, -4);
@@ -3966,7 +3964,7 @@ mod tests {
assert_eq_m64(r, _m_pmaxsw(a, b));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_max_pu8() {
let a = _mm_setr_pi8(2, 6, 3, 8, 2, 6, 3, 8);
let b = _mm_setr_pi8(5, 2, 7, 4, 5, 2, 7, 4);
@@ -3976,7 +3974,7 @@ mod tests {
assert_eq_m64(r, _m_pmaxub(a, b));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_min_pi16() {
let a = _mm_setr_pi16(-1, 6, -3, 8);
let b = _mm_setr_pi16(5, -2, 7, -4);
@@ -3986,7 +3984,7 @@ mod tests {
assert_eq_m64(r, _m_pminsw(a, b));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_min_pu8() {
let a = _mm_setr_pi8(2, 6, 3, 8, 2, 6, 3, 8);
let b = _mm_setr_pi8(5, 2, 7, 4, 5, 2, 7, 4);
@@ -3996,21 +3994,21 @@ mod tests {
assert_eq_m64(r, _m_pminub(a, b));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_mulhi_pu16() {
let (a, b) = (_mm_set1_pi16(1000), _mm_set1_pi16(1001));
let r = _mm_mulhi_pu16(a, b);
assert_eq_m64(r, _mm_set1_pi16(15));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_m_pmulhuw() {
let (a, b) = (_mm_set1_pi16(1000), _mm_set1_pi16(1001));
let r = _m_pmulhuw(a, b);
assert_eq_m64(r, _mm_set1_pi16(15));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_avg_pu8() {
let (a, b) = (_mm_set1_pi8(3), _mm_set1_pi8(9));
let r = _mm_avg_pu8(a, b);
@@ -4020,7 +4018,7 @@ mod tests {
assert_eq_m64(r, _mm_set1_pi8(6));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_avg_pu16() {
let (a, b) = (_mm_set1_pi16(3), _mm_set1_pi16(9));
let r = _mm_avg_pu16(a, b);
@@ -4030,7 +4028,7 @@ mod tests {
assert_eq_m64(r, _mm_set1_pi16(6));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_sad_pu8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_pi8(
@@ -4045,7 +4043,7 @@ mod tests {
assert_eq_m64(r, _mm_setr_pi16(1020, 0, 0, 0));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtpi32_ps() {
let a = _mm_setr_ps(0., 0., 3., 4.);
let b = _mm_setr_pi32(1, 2);
@@ -4057,7 +4055,7 @@ mod tests {
assert_eq_m128(r, expected);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtpi16_ps() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let expected = _mm_setr_ps(1., 2., 3., 4.);
@@ -4065,7 +4063,7 @@ mod tests {
assert_eq_m128(r, expected);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtpu16_ps() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let expected = _mm_setr_ps(1., 2., 3., 4.);
@@ -4073,7 +4071,7 @@ mod tests {
assert_eq_m128(r, expected);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtpi8_ps() {
let a = _mm_setr_pi8(1, 2, 3, 4, 5, 6, 7, 8);
let expected = _mm_setr_ps(1., 2., 3., 4.);
@@ -4081,7 +4079,7 @@ mod tests {
assert_eq_m128(r, expected);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtpu8_ps() {
let a = _mm_setr_pi8(1, 2, 3, 4, 5, 6, 7, 8);
let expected = _mm_setr_ps(1., 2., 3., 4.);
@@ -4089,7 +4087,7 @@ mod tests {
assert_eq_m128(r, expected);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtpi32x2_ps() {
let a = _mm_setr_pi32(1, 2);
let b = _mm_setr_pi32(3, 4);
@@ -4098,7 +4096,7 @@ mod tests {
assert_eq_m128(r, expected);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_maskmove_si64() {
let a = _mm_set1_pi8(9);
let mask = _mm_setr_pi8(0, 0, 0x80u8 as i8, 0, 0, 0, 0, 0);
@@ -4112,7 +4110,7 @@ mod tests {
assert_eq_m64(r, e);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_extract_pi16() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let r = _mm_extract_pi16(a, 0);
@@ -4124,7 +4122,7 @@ mod tests {
assert_eq!(r, 2);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_insert_pi16() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let r = _mm_insert_pi16(a, 0, 0b0);
@@ -4138,7 +4136,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_movemask_pi8() {
let a = _mm_setr_pi16(
0b1000_0000,
@@ -4153,7 +4151,7 @@ mod tests {
assert_eq!(r, 0b10001);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_shuffle_pi16() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let r = _mm_shuffle_pi16(a, 0b00_01_01_11);
@@ -4164,7 +4162,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtps_pi32() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let r = _mm_setr_pi32(1, 2);
@@ -4173,7 +4171,7 @@ mod tests {
assert_eq_m64(r, _mm_cvt_ps2pi(a));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvttps_pi32() {
let a = _mm_setr_ps(7.0, 2.0, 3.0, 4.0);
let r = _mm_setr_pi32(7, 2);
@@ -4182,14 +4180,14 @@ mod tests {
assert_eq_m64(r, _mm_cvtt_ps2pi(a));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtps_pi16() {
let a = _mm_setr_ps(7.0, 2.0, 3.0, 4.0);
let r = _mm_setr_pi16(7, 2, 3, 4);
assert_eq_m64(r, _mm_cvtps_pi16(a));
}
#[simd_test = "sse,mmx"]
#[simd_test(enable = "sse,mmx")]
unsafe fn test_mm_cvtps_pi8() {
let a = _mm_setr_ps(7.0, 2.0, 3.0, 4.0);
let r = _mm_setr_pi8(7, 2, 3, 4, 0, 0, 0, 0);

460
library/stdarch/coresimd/x86/sse2.rs
View File

File diff suppressed because it is too large Load Diff

22
library/stdarch/coresimd/x86/sse3.rs
View File

@@ -164,7 +164,7 @@ mod tests {
use coresimd::x86::*;
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_addsub_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -172,7 +172,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(99.0, 25.0, 0.0, -15.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_addsub_pd() {
let a = _mm_setr_pd(-1.0, 5.0);
let b = _mm_setr_pd(-100.0, 20.0);
@@ -180,7 +180,7 @@ mod tests {
assert_eq_m128d(r, _mm_setr_pd(99.0, 25.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_hadd_pd() {
let a = _mm_setr_pd(-1.0, 5.0);
let b = _mm_setr_pd(-100.0, 20.0);
@@ -188,7 +188,7 @@ mod tests {
assert_eq_m128d(r, _mm_setr_pd(4.0, -80.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_hadd_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -196,7 +196,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(4.0, -10.0, -80.0, -5.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_hsub_pd() {
let a = _mm_setr_pd(-1.0, 5.0);
let b = _mm_setr_pd(-100.0, 20.0);
@@ -204,7 +204,7 @@ mod tests {
assert_eq_m128d(r, _mm_setr_pd(-6.0, -120.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_hsub_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
@@ -212,7 +212,7 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(-6.0, 10.0, -120.0, 5.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_lddqu_si128() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -225,28 +225,28 @@ mod tests {
assert_eq_m128i(a, r);
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_movedup_pd() {
let a = _mm_setr_pd(-1.0, 5.0);
let r = _mm_movedup_pd(a);
assert_eq_m128d(r, _mm_setr_pd(-1.0, -1.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_movehdup_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let r = _mm_movehdup_ps(a);
assert_eq_m128(r, _mm_setr_ps(5.0, 5.0, -10.0, -10.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_moveldup_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let r = _mm_moveldup_ps(a);
assert_eq_m128(r, _mm_setr_ps(-1.0, -1.0, 0.0, 0.0));
}
#[simd_test = "sse3"]
#[simd_test(enable = "sse3")]
unsafe fn test_mm_loaddup_pd() {
let d = -5.0;
let r = _mm_loaddup_pd(&d);

124
library/stdarch/coresimd/x86/sse41.rs
View File

@@ -1233,7 +1233,7 @@ mod tests {
use std::mem;
use stdsimd_test::simd_test;
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_blendv_epi8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -1256,7 +1256,7 @@ mod tests {
assert_eq_m128i(_mm_blendv_epi8(a, b, mask), e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_blendv_pd() {
let a = _mm_set1_pd(0.0);
let b = _mm_set1_pd(1.0);
@@ -1266,7 +1266,7 @@ mod tests {
assert_eq_m128d(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_blendv_ps() {
let a = _mm_set1_ps(0.0);
let b = _mm_set1_ps(1.0);
@@ -1276,7 +1276,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_blend_pd() {
let a = _mm_set1_pd(0.0);
let b = _mm_set1_pd(1.0);
@@ -1285,7 +1285,7 @@ mod tests {
assert_eq_m128d(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_blend_ps() {
let a = _mm_set1_ps(0.0);
let b = _mm_set1_ps(1.0);
@@ -1294,7 +1294,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_blend_epi16() {
let a = _mm_set1_epi16(0);
let b = _mm_set1_epi16(1);
@@ -1303,7 +1303,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_extract_ps() {
let a = _mm_setr_ps(0.0, 1.0, 2.0, 3.0);
let r: f32 = mem::transmute(_mm_extract_ps(a, 1));
@@ -1312,7 +1312,7 @@ mod tests {
assert_eq!(r, 1.0);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_extract_epi8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -1325,7 +1325,7 @@ mod tests {
assert_eq!(r2, 3);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_extract_epi32() {
let a = _mm_setr_epi32(0, 1, 2, 3);
let r = _mm_extract_epi32(a, 1);
@@ -1334,7 +1334,7 @@ mod tests {
assert_eq!(r, 1);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_insert_ps() {
let a = _mm_set1_ps(1.0);
let b = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@@ -1343,7 +1343,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_insert_epi8() {
let a = _mm_set1_epi8(0);
let e = _mm_setr_epi8(0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
@@ -1353,7 +1353,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_insert_epi32() {
let a = _mm_set1_epi32(0);
let e = _mm_setr_epi32(0, 32, 0, 0);
@@ -1363,7 +1363,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_max_epi8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -1384,7 +1384,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_max_epu16() {
let a = _mm_setr_epi16(1, 4, 5, 8, 9, 12, 13, 16);
let b = _mm_setr_epi16(2, 3, 6, 7, 10, 11, 14, 15);
@@ -1393,7 +1393,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_max_epi32() {
let a = _mm_setr_epi32(1, 4, 5, 8);
let b = _mm_setr_epi32(2, 3, 6, 7);
@@ -1402,7 +1402,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_max_epu32() {
let a = _mm_setr_epi32(1, 4, 5, 8);
let b = _mm_setr_epi32(2, 3, 6, 7);
@@ -1411,7 +1411,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_min_epi8_1() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -1432,7 +1432,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_min_epi8_2() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -1453,7 +1453,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_min_epu16() {
let a = _mm_setr_epi16(1, 4, 5, 8, 9, 12, 13, 16);
let b = _mm_setr_epi16(2, 3, 6, 7, 10, 11, 14, 15);
@@ -1462,7 +1462,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_min_epi32_1() {
let a = _mm_setr_epi32(1, 4, 5, 8);
let b = _mm_setr_epi32(2, 3, 6, 7);
@@ -1471,7 +1471,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_min_epi32_2() {
let a = _mm_setr_epi32(-1, 4, 5, -7);
let b = _mm_setr_epi32(-2, 3, -6, 8);
@@ -1480,7 +1480,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_min_epu32() {
let a = _mm_setr_epi32(1, 4, 5, 8);
let b = _mm_setr_epi32(2, 3, 6, 7);
@@ -1489,7 +1489,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_packus_epi32() {
let a = _mm_setr_epi32(1, 2, 3, 4);
let b = _mm_setr_epi32(-1, -2, -3, -4);
@@ -1498,7 +1498,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cmpeq_epi64() {
let a = _mm_setr_epi64x(0, 1);
let b = _mm_setr_epi64x(0, 0);
@@ -1507,7 +1507,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepi8_epi16() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepi8_epi16(a);
@@ -1519,7 +1519,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepi8_epi32() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepi8_epi32(a);
@@ -1531,7 +1531,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepi8_epi64() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepi8_epi64(a);
@@ -1543,7 +1543,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepi16_epi32() {
let a = _mm_set1_epi16(10);
let r = _mm_cvtepi16_epi32(a);
@@ -1555,7 +1555,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepi16_epi64() {
let a = _mm_set1_epi16(10);
let r = _mm_cvtepi16_epi64(a);
@@ -1567,7 +1567,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepi32_epi64() {
let a = _mm_set1_epi32(10);
let r = _mm_cvtepi32_epi64(a);
@@ -1579,7 +1579,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepu8_epi16() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepu8_epi16(a);
@@ -1587,7 +1587,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepu8_epi32() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepu8_epi32(a);
@@ -1595,7 +1595,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepu8_epi64() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepu8_epi64(a);
@@ -1603,7 +1603,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepu16_epi32() {
let a = _mm_set1_epi16(10);
let r = _mm_cvtepu16_epi32(a);
@@ -1611,7 +1611,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepu16_epi64() {
let a = _mm_set1_epi16(10);
let r = _mm_cvtepu16_epi64(a);
@@ -1619,7 +1619,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_cvtepu32_epi64() {
let a = _mm_set1_epi32(10);
let r = _mm_cvtepu32_epi64(a);
@@ -1627,7 +1627,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_dp_pd() {
let a = _mm_setr_pd(2.0, 3.0);
let b = _mm_setr_pd(1.0, 4.0);
@@ -1635,7 +1635,7 @@ mod tests {
assert_eq_m128d(_mm_dp_pd(a, b, 0b00110001), e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_dp_ps() {
let a = _mm_setr_ps(2.0, 3.0, 1.0, 10.0);
let b = _mm_setr_ps(1.0, 4.0, 0.5, 10.0);
@@ -1643,7 +1643,7 @@ mod tests {
assert_eq_m128(_mm_dp_ps(a, b, 0b01110101), e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_floor_pd() {
let a = _mm_setr_pd(2.5, 4.5);
let r = _mm_floor_pd(a);
@@ -1651,7 +1651,7 @@ mod tests {
assert_eq_m128d(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_floor_ps() {
let a = _mm_setr_ps(2.5, 4.5, 8.5, 16.5);
let r = _mm_floor_ps(a);
@@ -1659,7 +1659,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_floor_sd() {
let a = _mm_setr_pd(2.5, 4.5);
let b = _mm_setr_pd(-1.5, -3.5);
@@ -1668,7 +1668,7 @@ mod tests {
assert_eq_m128d(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_floor_ss() {
let a = _mm_setr_ps(2.5, 4.5, 8.5, 16.5);
let b = _mm_setr_ps(-1.5, -3.5, -7.5, -15.5);
@@ -1677,7 +1677,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_ceil_pd() {
let a = _mm_setr_pd(1.5, 3.5);
let r = _mm_ceil_pd(a);
@@ -1685,7 +1685,7 @@ mod tests {
assert_eq_m128d(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_ceil_ps() {
let a = _mm_setr_ps(1.5, 3.5, 7.5, 15.5);
let r = _mm_ceil_ps(a);
@@ -1693,7 +1693,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_ceil_sd() {
let a = _mm_setr_pd(1.5, 3.5);
let b = _mm_setr_pd(-2.5, -4.5);
@@ -1702,7 +1702,7 @@ mod tests {
assert_eq_m128d(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_ceil_ss() {
let a = _mm_setr_ps(1.5, 3.5, 7.5, 15.5);
let b = _mm_setr_ps(-2.5, -4.5, -8.5, -16.5);
@@ -1711,7 +1711,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_round_pd() {
let a = _mm_setr_pd(1.25, 3.75);
let r = _mm_round_pd(a, _MM_FROUND_TO_NEAREST_INT);
@@ -1719,7 +1719,7 @@ mod tests {
assert_eq_m128d(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_round_ps() {
let a = _mm_setr_ps(2.25, 4.75, -1.75, -4.25);
let r = _mm_round_ps(a, _MM_FROUND_TO_ZERO);
@@ -1727,7 +1727,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_round_sd() {
let a = _mm_setr_pd(1.5, 3.5);
let b = _mm_setr_pd(-2.5, -4.5);
@@ -1739,7 +1739,7 @@ mod tests {
assert_eq_m128d(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_round_ss() {
let a = _mm_setr_ps(1.5, 3.5, 7.5, 15.5);
let b = _mm_setr_ps(-1.75, -4.5, -8.5, -16.5);
@@ -1751,7 +1751,7 @@ mod tests {
assert_eq_m128(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_minpos_epu16_1() {
let a = _mm_setr_epi16(23, 18, 44, 97, 50, 13, 67, 66);
let r = _mm_minpos_epu16(a);
@@ -1759,7 +1759,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_minpos_epu16_2() {
let a = _mm_setr_epi16(0, 18, 44, 97, 50, 13, 67, 66);
let r = _mm_minpos_epu16(a);
@@ -1767,7 +1767,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_mul_epi32() {
{
let a = _mm_setr_epi32(1, 1, 1, 1);
@@ -1795,7 +1795,7 @@ mod tests {
}
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_mullo_epi32() {
{
let a = _mm_setr_epi32(1, 1, 1, 1);
@@ -1816,7 +1816,7 @@ mod tests {
}
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_minpos_epu16() {
let a = _mm_setr_epi16(8, 7, 6, 5, 4, 1, 2, 3);
let r = _mm_minpos_epu16(a);
@@ -1824,7 +1824,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_mpsadbw_epu8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -1853,7 +1853,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_testz_si128() {
let a = _mm_set1_epi8(1);
let mask = _mm_set1_epi8(0);
@@ -1869,7 +1869,7 @@ mod tests {
assert_eq!(r, 1);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_testc_si128() {
let a = _mm_set1_epi8(-1);
let mask = _mm_set1_epi8(0);
@@ -1885,7 +1885,7 @@ mod tests {
assert_eq!(r, 1);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_testnzc_si128() {
let a = _mm_set1_epi8(0);
let mask = _mm_set1_epi8(1);
@@ -1905,7 +1905,7 @@ mod tests {
assert_eq!(r, 0);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_test_all_zeros() {
let a = _mm_set1_epi8(1);
let mask = _mm_set1_epi8(0);
@@ -1921,7 +1921,7 @@ mod tests {
assert_eq!(r, 1);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_test_all_ones() {
let a = _mm_set1_epi8(-1);
let r = _mm_test_all_ones(a);
@@ -1931,7 +1931,7 @@ mod tests {
assert_eq!(r, 0);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_test_mix_ones_zeros() {
let a = _mm_set1_epi8(0);
let mask = _mm_set1_epi8(1);

46
library/stdarch/coresimd/x86/sse42.rs
View File

@@ -118,8 +118,6 @@ pub unsafe fn _mm_cmpistrm(a: __m128i, b: __m128i, imm8: i32) -> __m128i {
/// Find a substring using [`_SIDD_CMP_EQUAL_ORDERED`]
///
/// ```
/// # #![feature(cfg_target_feature)]
/// # #![feature(target_feature)]
/// # #![feature(stdsimd)]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
@@ -167,8 +165,6 @@ pub unsafe fn _mm_cmpistrm(a: __m128i, b: __m128i, imm8: i32) -> __m128i {
/// one or more of a given set of characters in the haystack.
///
/// ```
/// # #![feature(cfg_target_feature)]
/// # #![feature(target_feature)]
/// # #![feature(stdsimd)]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
@@ -213,8 +209,6 @@ pub unsafe fn _mm_cmpistrm(a: __m128i, b: __m128i, imm8: i32) -> __m128i {
/// range of characters.
///
/// ```
/// # #![feature(cfg_target_feature)]
/// # #![feature(target_feature)]
/// # #![feature(stdsimd)]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
@@ -259,8 +253,6 @@ pub unsafe fn _mm_cmpistrm(a: __m128i, b: __m128i, imm8: i32) -> __m128i {
/// Working with 16-bit characters.
///
/// ```
/// # #![feature(cfg_target_feature)]
/// # #![feature(target_feature)]
/// # #![feature(stdsimd)]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
@@ -492,8 +484,6 @@ pub unsafe fn _mm_cmpestrm(
/// # Examples
///
/// ```
/// # #![feature(cfg_target_feature)]
/// # #![feature(target_feature)]
/// # #![feature(stdsimd)]
/// # #![cfg_attr(not(dox), no_std)]
/// # #[cfg(not(dox))]
@@ -794,7 +784,7 @@ mod tests {
_mm_loadu_si128(slice.as_ptr() as *const _)
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistrm() {
let a = str_to_m128i(b"Hello! Good-Bye!");
let b = str_to_m128i(b"hello! good-bye!");
@@ -807,7 +797,7 @@ mod tests {
assert_eq_m128i(i, res);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistri() {
let a = str_to_m128i(b"Hello");
let b = str_to_m128i(b" Hello ");
@@ -815,7 +805,7 @@ mod tests {
assert_eq!(3, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistrz() {
let a = str_to_m128i(b"");
let b = str_to_m128i(b"Hello");
@@ -823,7 +813,7 @@ mod tests {
assert_eq!(1, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistrc() {
let a = str_to_m128i(b" ");
let b = str_to_m128i(b" ! ");
@@ -831,7 +821,7 @@ mod tests {
assert_eq!(1, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistrs() {
let a = str_to_m128i(b"Hello");
let b = str_to_m128i(b"");
@@ -839,7 +829,7 @@ mod tests {
assert_eq!(1, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistro() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a_bytes = _mm_setr_epi8(
@@ -857,7 +847,7 @@ mod tests {
assert_eq!(0, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistra() {
let a = str_to_m128i(b"");
let b = str_to_m128i(b"Hello!!!!!!!!!!!");
@@ -865,7 +855,7 @@ mod tests {
assert_eq!(1, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestrm() {
let a = str_to_m128i(b"Hello!");
let b = str_to_m128i(b"Hello.");
@@ -878,7 +868,7 @@ mod tests {
assert_eq_m128i(i, r);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestri() {
let a = str_to_m128i(b"bar - garbage");
let b = str_to_m128i(b"foobar");
@@ -886,7 +876,7 @@ mod tests {
assert_eq!(3, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestrz() {
let a = str_to_m128i(b"");
let b = str_to_m128i(b"Hello");
@@ -894,7 +884,7 @@ mod tests {
assert_eq!(1, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestrc() {
let va = str_to_m128i(b"!!!!!!!!");
let vb = str_to_m128i(b" ");
@@ -902,7 +892,7 @@ mod tests {
assert_eq!(0, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestrs() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a_bytes = _mm_setr_epi8(
@@ -915,7 +905,7 @@ mod tests {
assert_eq!(0, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestro() {
let a = str_to_m128i(b"Hello");
let b = str_to_m128i(b"World");
@@ -923,7 +913,7 @@ mod tests {
assert_eq!(0, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestra() {
let a = str_to_m128i(b"Cannot match a");
let b = str_to_m128i(b"Null after 14");
@@ -937,7 +927,7 @@ mod tests {
assert_eq!(1, i);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_crc32_u8() {
let crc = 0x2aa1e72b;
let v = 0x2a;
@@ -945,7 +935,7 @@ mod tests {
assert_eq!(i, 0xf24122e4);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_crc32_u16() {
let crc = 0x8ecec3b5;
let v = 0x22b;
@@ -953,7 +943,7 @@ mod tests {
assert_eq!(i, 0x13bb2fb);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_crc32_u32() {
let crc = 0xae2912c8;
let v = 0x845fed;
@@ -961,7 +951,7 @@ mod tests {
assert_eq!(i, 0xffae2ed1);
}
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpgt_epi64() {
let a = _mm_setr_epi64x(0, 0x2a);
let b = _mm_set1_epi64x(0x00);

8
library/stdarch/coresimd/x86/sse4a.rs
View File

@@ -81,7 +81,7 @@ mod tests {
use coresimd::x86::*;
use stdsimd_test::simd_test;
#[simd_test = "sse4a"]
#[simd_test(enable = "sse4a")]
unsafe fn test_mm_extract_si64() {
let b = 0b0110_0000_0000_i64;
// ^^^^ bit range extracted
@@ -94,7 +94,7 @@ mod tests {
assert_eq_m128i(r, e);
}
#[simd_test = "sse4a"]
#[simd_test(enable = "sse4a")]
unsafe fn test_mm_insert_si64() {
let i = 0b0110_i64;
// ^^^^ bit range inserted
@@ -116,7 +116,7 @@ mod tests {
data: [f64; 2],
}
#[simd_test = "sse4a"]
#[simd_test(enable = "sse4a")]
unsafe fn test_mm_stream_sd() {
let mut mem = MemoryF64 {
data: [1.0_f64, 2.0],
@@ -138,7 +138,7 @@ mod tests {
data: [f32; 4],
}
#[simd_test = "sse4a"]
#[simd_test(enable = "sse4a")]
unsafe fn test_mm_stream_ss() {
let mut mem = MemoryF32 {
data: [1.0_f32, 2.0, 3.0, 4.0],

64
library/stdarch/coresimd/x86/ssse3.rs
View File

@@ -564,25 +564,25 @@ mod tests {
use coresimd::x86::*;
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_abs_epi8() {
let r = _mm_abs_epi8(_mm_set1_epi8(-5));
assert_eq_m128i(r, _mm_set1_epi8(5));
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_abs_epi16() {
let r = _mm_abs_epi16(_mm_set1_epi16(-5));
assert_eq_m128i(r, _mm_set1_epi16(5));
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_abs_epi32() {
let r = _mm_abs_epi32(_mm_set1_epi32(-5));
assert_eq_m128i(r, _mm_set1_epi32(5));
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_shuffle_epi8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -618,7 +618,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_alignr_epi8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -658,7 +658,7 @@ mod tests {
assert_eq_m128i(r, b);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_hadd_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 24, 12, 6, 19);
@@ -667,7 +667,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_hadds_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 32767, 1, -32768, -1);
@@ -676,7 +676,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_hadd_epi32() {
let a = _mm_setr_epi32(1, 2, 3, 4);
let b = _mm_setr_epi32(4, 128, 4, 3);
@@ -685,7 +685,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_hsub_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 24, 12, 6, 19);
@@ -694,7 +694,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_hsubs_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 32767, -1, -32768, 1);
@@ -703,7 +703,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_hsub_epi32() {
let a = _mm_setr_epi32(1, 2, 3, 4);
let b = _mm_setr_epi32(4, 128, 4, 3);
@@ -712,7 +712,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_maddubs_epi16() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -731,7 +731,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_mulhrs_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 32767, -1, -32768, 1);
@@ -740,7 +740,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_sign_epi8() {
#[cfg_attr(rustfmt, rustfmt_skip)]
let a = _mm_setr_epi8(
@@ -761,7 +761,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_sign_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, -5, -6, 7, 8);
let b = _mm_setr_epi16(4, 128, 0, 3, 1, -1, -2, 1);
@@ -770,7 +770,7 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3"]
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_sign_epi32() {
let a = _mm_setr_epi32(-1, 2, 3, 4);
let b = _mm_setr_epi32(1, -1, 1, 0);
@@ -779,25 +779,25 @@ mod tests {
assert_eq_m128i(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_abs_pi8() {
let r = _mm_abs_pi8(_mm_set1_pi8(-5));
assert_eq_m64(r, _mm_set1_pi8(5));
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_abs_pi16() {
let r = _mm_abs_pi16(_mm_set1_pi16(-5));
assert_eq_m64(r, _mm_set1_pi16(5));
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_abs_pi32() {
let r = _mm_abs_pi32(_mm_set1_pi32(-5));
assert_eq_m64(r, _mm_set1_pi32(5));
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_shuffle_pi8() {
let a = _mm_setr_pi8(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_pi8(4, 128u8 as i8, 4, 3, 24, 12, 6, 19);
@@ -806,7 +806,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_alignr_pi8() {
let a = _mm_setr_pi32(0x89ABCDEF_u32 as i32, 0x01234567_u32 as i32);
let b = _mm_setr_pi32(0xBBAA9988_u32 as i32, 0xFFDDEECC_u32 as i32);
@@ -814,7 +814,7 @@ mod tests {
assert_eq_m64(r, ::std::mem::transmute(0x89abcdefffddeecc_u64));
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_hadd_pi16() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let b = _mm_setr_pi16(4, 128, 4, 3);
@@ -823,7 +823,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_hadd_pi32() {
let a = _mm_setr_pi32(1, 2);
let b = _mm_setr_pi32(4, 128);
@@ -832,7 +832,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_hadds_pi16() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let b = _mm_setr_pi16(32767, 1, -32768, -1);
@@ -841,7 +841,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_hsub_pi16() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let b = _mm_setr_pi16(4, 128, 4, 3);
@@ -850,7 +850,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_hsub_pi32() {
let a = _mm_setr_pi32(1, 2);
let b = _mm_setr_pi32(4, 128);
@@ -859,7 +859,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_hsubs_pi16() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let b = _mm_setr_pi16(4, 128, 4, 3);
@@ -868,7 +868,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_maddubs_pi16() {
let a = _mm_setr_pi8(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_pi8(4, 63, 4, 3, 24, 12, 6, 19);
@@ -877,7 +877,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_mulhrs_pi16() {
let a = _mm_setr_pi16(1, 2, 3, 4);
let b = _mm_setr_pi16(4, 32767, -1, -32768);
@@ -886,7 +886,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_sign_pi8() {
let a = _mm_setr_pi8(1, 2, 3, 4, -5, -6, 7, 8);
let b = _mm_setr_pi8(4, 64, 0, 3, 1, -1, -2, 1);
@@ -895,7 +895,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_sign_pi16() {
let a = _mm_setr_pi16(-1, 2, 3, 4);
let b = _mm_setr_pi16(1, -1, 1, 0);
@@ -904,7 +904,7 @@ mod tests {
assert_eq_m64(r, expected);
}
#[simd_test = "ssse3,mmx"]
#[simd_test(enable = "ssse3,mmx")]
unsafe fn test_mm_sign_pi32() {
let a = _mm_setr_pi32(-1, 2);
let b = _mm_setr_pi32(1, 0);

40
library/stdarch/coresimd/x86/tbm.rs
View File

@@ -284,31 +284,31 @@ mod tests {
use coresimd::x86::*;
/*
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_bextr_u32() {
assert_eq!(_bextr_u32(0b0101_0000u32, 4, 4), 0b0000_0101u32);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_bextr_u64() {
assert_eq!(_bextr_u64(0b0101_0000u64, 4, 4), 0b0000_0101u64);
}
*/
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_blcfill_u32() {
assert_eq!(_blcfill_u32(0b0101_0111u32), 0b0101_0000u32);
assert_eq!(_blcfill_u32(0b1111_1111u32), 0u32);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
unsafe fn test_blcfill_u64() {
assert_eq!(_blcfill_u64(0b0101_0111u64), 0b0101_0000u64);
assert_eq!(_blcfill_u64(0b1111_1111u64), 0u64);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_blci_u32() {
assert_eq!(
_blci_u32(0b0101_0000u32),
@@ -320,7 +320,7 @@ mod tests {
);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
#[cfg_attr(rustfmt, rustfmt_skip)]
unsafe fn test_blci_u64() {
@@ -334,46 +334,46 @@ mod tests {
);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_blcic_u32() {
assert_eq!(_blcic_u32(0b0101_0001u32), 0b0000_0010u32);
assert_eq!(_blcic_u32(0b1111_1111u32), 0b1_0000_0000u32);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
unsafe fn test_blcic_u64() {
assert_eq!(_blcic_u64(0b0101_0001u64), 0b0000_0010u64);
assert_eq!(_blcic_u64(0b1111_1111u64), 0b1_0000_0000u64);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_blcmsk_u32() {
assert_eq!(_blcmsk_u32(0b0101_0001u32), 0b0000_0011u32);
assert_eq!(_blcmsk_u32(0b1111_1111u32), 0b1_1111_1111u32);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
unsafe fn test_blcmsk_u64() {
assert_eq!(_blcmsk_u64(0b0101_0001u64), 0b0000_0011u64);
assert_eq!(_blcmsk_u64(0b1111_1111u64), 0b1_1111_1111u64);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_blcs_u32() {
assert_eq!(_blcs_u32(0b0101_0001u32), 0b0101_0011u32);
assert_eq!(_blcs_u32(0b1111_1111u32), 0b1_1111_1111u32);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
unsafe fn test_blcs_u64() {
assert_eq!(_blcs_u64(0b0101_0001u64), 0b0101_0011u64);
assert_eq!(_blcs_u64(0b1111_1111u64), 0b1_1111_1111u64);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_blsfill_u32() {
assert_eq!(_blsfill_u32(0b0101_0100u32), 0b0101_0111u32);
assert_eq!(
@@ -382,7 +382,7 @@ mod tests {
);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
#[cfg_attr(rustfmt, rustfmt_skip)]
unsafe fn test_blsfill_u64() {
@@ -393,7 +393,7 @@ mod tests {
);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_blsic_u32() {
assert_eq!(
_blsic_u32(0b0101_0100u32),
@@ -405,7 +405,7 @@ mod tests {
);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
#[cfg_attr(rustfmt, rustfmt_skip)]
unsafe fn test_blsic_u64() {
@@ -419,7 +419,7 @@ mod tests {
);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_t1mskc_u32() {
assert_eq!(
_t1mskc_u32(0b0101_0111u32),
@@ -431,7 +431,7 @@ mod tests {
);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
#[cfg_attr(rustfmt, rustfmt_skip)]
unsafe fn test_t1mksc_u64() {
@@ -445,13 +445,13 @@ mod tests {
);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
unsafe fn test_tzmsk_u32() {
assert_eq!(_tzmsk_u32(0b0101_1000u32), 0b0000_0111u32);
assert_eq!(_tzmsk_u32(0b0101_1001u32), 0b0000_0000u32);
}
#[simd_test = "tbm"]
#[simd_test(enable = "tbm")]
#[cfg(not(target_arch = "x86"))]
unsafe fn test_tzmsk_u64() {
assert_eq!(_tzmsk_u64(0b0101_1000u64), 0b0000_0111u64);

12
library/stdarch/coresimd/x86/xsave.rs
View File

@@ -231,7 +231,7 @@ mod tests {
// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
/*
#[simd_test = "xsave"]
#[simd_test(enable = "xsave")]
unsafe fn xsave() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
@@ -244,7 +244,7 @@ mod tests {
}
*/
#[simd_test = "xsave"]
#[simd_test(enable = "xsave")]
unsafe fn xgetbv_xsetbv() {
let xcr_n: u32 = _XCR_XFEATURE_ENABLED_MASK;
@@ -259,7 +259,7 @@ mod tests {
// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
/*
#[simd_test = "xsave,xsaveopt"]
#[simd_test(enable = "xsave,xsaveopt")]
unsafe fn xsaveopt() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
@@ -273,8 +273,8 @@ mod tests {
*/
// FIXME: this looks like a bug in Intel's SDE:
#[cfg(not(feature = "intel_sde"))]
#[simd_test = "xsave,xsavec"]
#[cfg(not(stdsimd_intel_sde))]
#[simd_test(enable = "xsave,xsavec")]
unsafe fn xsavec() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
@@ -288,7 +288,7 @@ mod tests {
// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
/*
#[simd_test = "xsave,xsaves"]
#[simd_test(enable = "xsave,xsaves")]
unsafe fn xsaves() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();

4
library/stdarch/coresimd/x86_64/abm.rs
View File

@@ -50,12 +50,12 @@ mod tests {
use coresimd::arch::x86_64::*;
#[simd_test = "lzcnt"]
#[simd_test(enable = "lzcnt")]
unsafe fn test_lzcnt_u64() {
assert_eq!(_lzcnt_u64(0b0101_1010), 57);
}
#[simd_test = "popcnt"]
#[simd_test(enable = "popcnt")]
unsafe fn test_popcnt64() {
assert_eq!(_popcnt64(0b0101_1010), 4);
}

2
library/stdarch/coresimd/x86_64/avx.rs
View File

@@ -36,7 +36,7 @@ mod tests {
use coresimd::x86::*;
#[simd_test = "avx"]
#[simd_test(enable = "avx")]
unsafe fn test_mm256_insert_epi64() {
let a = _mm256_setr_epi64x(1, 2, 3, 4);
let r = _mm256_insert_epi64(a, 0, 3);

2
library/stdarch/coresimd/x86_64/avx2.rs
View File

@@ -40,7 +40,7 @@ mod tests {
use coresimd::arch::x86_64::*;
#[simd_test = "avx2"]
#[simd_test(enable = "avx2")]
unsafe fn test_mm256_extract_epi64() {
let a = _mm256_setr_epi64x(0, 1, 2, 3);
let r = _mm256_extract_epi64(a, 3);

12
library/stdarch/coresimd/x86_64/bmi.rs
View File

@@ -128,13 +128,13 @@ mod tests {
use coresimd::x86::*;
use coresimd::x86_64::*;
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_bextr_u64() {
let r = _bextr_u64(0b0101_0000u64, 4, 4);
assert_eq!(r, 0b0000_0101u64);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_andn_u64() {
assert_eq!(_andn_u64(0, 0), 0);
assert_eq!(_andn_u64(0, 1), 1);
@@ -157,25 +157,25 @@ mod tests {
assert_eq!(r, 0b0001_1101u64);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_blsi_u64() {
assert_eq!(_blsi_u64(0b1101_0000u64), 0b0001_0000u64);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_blsmsk_u64() {
let r = _blsmsk_u64(0b0011_0000u64);
assert_eq!(r, 0b0001_1111u64);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_blsr_u64() {
// TODO: test the behavior when the input is 0
let r = _blsr_u64(0b0011_0000u64);
assert_eq!(r, 0b0010_0000u64);
}
#[simd_test = "bmi1"]
#[simd_test(enable = "bmi1")]
unsafe fn test_tzcnt_u64() {
assert_eq!(_tzcnt_u64(0b0000_0001u64), 0u64);
assert_eq!(_tzcnt_u64(0b0000_0000u64), 64u64);

8
library/stdarch/coresimd/x86_64/bmi2.rs
View File

@@ -83,7 +83,7 @@ mod tests {
use coresimd::x86_64::*;
#[simd_test = "bmi2"]
#[simd_test(enable = "bmi2")]
unsafe fn test_pext_u64() {
let n = 0b1011_1110_1001_0011u64;
@@ -97,7 +97,7 @@ mod tests {
assert_eq!(_pext_u64(n, m1), s1);
}
#[simd_test = "bmi2"]
#[simd_test(enable = "bmi2")]
unsafe fn test_pdep_u64() {
let n = 0b1011_1110_1001_0011u64;
@@ -111,14 +111,14 @@ mod tests {
assert_eq!(_pdep_u64(n, m1), s1);
}
#[simd_test = "bmi2"]
#[simd_test(enable = "bmi2")]
unsafe fn test_bzhi_u64() {
let n = 0b1111_0010u64;
let s = 0b0001_0010u64;
assert_eq!(_bzhi_u64(n, 5), s);
}
#[simd_test = "bmi2"]
#[simd_test(enable = "bmi2")]
#[cfg_attr(rustfmt, rustfmt_skip)]
unsafe fn test_mulx_u64() {
let a: u64 = 9_223_372_036_854_775_800;

2
library/stdarch/coresimd/x86_64/fxsr.rs
View File

@@ -99,7 +99,7 @@ mod tests {
}
}
#[simd_test = "fxsr"]
#[simd_test(enable = "fxsr")]
unsafe fn fxsave64() {
let mut a = FxsaveArea::new();
let mut b = FxsaveArea::new();

6
library/stdarch/coresimd/x86_64/sse.rs
View File

@@ -77,7 +77,7 @@ mod tests {
use coresimd::arch::x86_64::*;
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvtss_si64() {
let inputs = &[
(42.0f32, 42i64),
@@ -102,7 +102,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvttss_si64() {
let inputs = &[
(42.0f32, 42i64),
@@ -130,7 +130,7 @@ mod tests {
}
}
#[simd_test = "sse"]
#[simd_test(enable = "sse")]
pub unsafe fn test_mm_cvtsi64_ss() {
let inputs = &[
(4555i64, 4555.0f32),

16
library/stdarch/coresimd/x86_64/sse2.rs
View File

@@ -152,7 +152,7 @@ mod tests {
use coresimd::arch::x86_64::*;
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvtsd_si64() {
let r = _mm_cvtsd_si64(_mm_setr_pd(-2.0, 5.0));
assert_eq!(r, -2_i64);
@@ -161,27 +161,27 @@ mod tests {
assert_eq!(r, i64::MIN);
}
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvtsd_si64x() {
let r = _mm_cvtsd_si64x(_mm_setr_pd(f64::NAN, f64::NAN));
assert_eq!(r, i64::MIN);
}
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvttsd_si64() {
let a = _mm_setr_pd(-1.1, 2.2);
let r = _mm_cvttsd_si64(a);
assert_eq!(r, -1_i64);
}
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvttsd_si64x() {
let a = _mm_setr_pd(f64::NEG_INFINITY, f64::NAN);
let r = _mm_cvttsd_si64x(a);
assert_eq!(r, i64::MIN);
}
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn test_mm_stream_si64() {
let a: i64 = 7;
let mut mem = ::std::boxed::Box::<i64>::new(-1);
@@ -189,19 +189,19 @@ mod tests {
assert_eq!(a, *mem);
}
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvtsi64_si128() {
let r = _mm_cvtsi64_si128(5);
assert_eq_m128i(r, _mm_setr_epi64x(5, 0));
}
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvtsi128_si64() {
let r = _mm_cvtsi128_si64(_mm_setr_epi64x(5, 0));
assert_eq!(r, 5);
}
#[simd_test = "sse2"]
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvtsi64_sd() {
let a = _mm_set1_pd(3.5);
let r = _mm_cvtsi64_sd(a, 5);

4
library/stdarch/coresimd/x86_64/sse41.rs
View File

@@ -39,7 +39,7 @@ mod tests {
use coresimd::arch::x86_64::*;
use stdsimd_test::simd_test;
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_extract_epi64() {
let a = _mm_setr_epi64x(0, 1);
let r = _mm_extract_epi64(a, 1);
@@ -48,7 +48,7 @@ mod tests {
assert_eq!(r, 1);
}
#[simd_test = "sse4.1"]
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_insert_epi64() {
let a = _mm_set1_epi64x(0);
let e = _mm_setr_epi64x(0, 32);

2
library/stdarch/coresimd/x86_64/sse42.rs
View File

@@ -27,7 +27,7 @@ mod tests {
use stdsimd_test::simd_test;
#[simd_test = "sse4.2"]
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_crc32_u64() {
let crc = 0x7819dccd3e824;
let v = 0x2a22b845fed;

8
library/stdarch/coresimd/x86_64/xsave.rs
View File

@@ -192,7 +192,7 @@ mod tests {
}
}
#[simd_test = "xsave"]
#[simd_test(enable = "xsave")]
unsafe fn xsave64() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
@@ -204,7 +204,7 @@ mod tests {
assert_eq!(a, b);
}
#[simd_test = "xsave,xsaveopt"]
#[simd_test(enable = "xsave,xsaveopt")]
unsafe fn xsaveopt64() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
@@ -216,7 +216,7 @@ mod tests {
assert_eq!(a, b);
}
#[simd_test = "xsave,xsavec"]
#[simd_test(enable = "xsave,xsavec")]
unsafe fn xsavec64() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
@@ -228,7 +228,7 @@ mod tests {
assert_eq!(a, b);
}
#[simd_test = "xsave,xsaves"]
#[simd_test(enable = "xsave,xsaves")]
unsafe fn xsaves64() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();

4
library/stdarch/crates/assert-instr-macro/src/lib.rs
View File

@@ -137,7 +137,7 @@ struct Invoc {
}
impl syn::synom::Synom for Invoc {
named!(parse -> Self, map!(parens!(do_parse!(
named!(parse -> Self, do_parse!(
instr: syn!(syn::Expr) >>
args: many0!(do_parse!(
syn!(syn::token::Comma) >>
@@ -150,7 +150,7 @@ impl syn::synom::Synom for Invoc {
instr,
args,
})
)), |p| p.1));
));
}
struct Append<T>(T);

8
library/stdarch/crates/coresimd/src/lib.rs
View File

@@ -6,15 +6,17 @@
//!
//! [stdsimd]: https://rust-lang-nursery.github.io/stdsimd/x86_64/stdsimd/
#![cfg_attr(feature = "strict", deny(warnings))]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![allow(dead_code)]
#![allow(unused_features)]
#![feature(const_fn, link_llvm_intrinsics, platform_intrinsics, repr_simd,
simd_ffi, target_feature, cfg_target_feature, asm,
simd_ffi, asm,
integer_atomics, stmt_expr_attributes, core_intrinsics,
crate_in_paths, no_core, attr_literals, rustc_attrs, stdsimd,
staged_api, fn_must_use, core_float, core_slice_ext, align_offset,
doc_cfg)]
doc_cfg, mmx_target_feature, tbm_target_feature,
sse4a_target_feature, arm_target_feature, aarch64_target_feature,
mips_target_feature)]
#![cfg_attr(test,
feature(proc_macro, test, attr_literals, abi_vectorcall,
untagged_unions))]

4
library/stdarch/crates/coresimd/tests/cpu-detection.rs
View File

@@ -1,5 +1,5 @@
#![feature(cfg_target_feature, stdsimd)]
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![cfg_attr(feature = "cargo-clippy",
allow(option_unwrap_used, print_stdout, use_debug))]

4
library/stdarch/crates/coresimd/tests/endian_tests.rs
View File

@@ -1,5 +1,5 @@
#![feature(cfg_target_feature, stdsimd)]
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
extern crate core;
extern crate coresimd;

6
library/stdarch/crates/coresimd/tests/reductions.rs
View File

@@ -1,4 +1,8 @@
#![feature(cfg_target_feature, stdsimd, target_feature)]
#![feature(stdsimd, sse4a_target_feature, avx512_target_feature)]
#![feature(arm_target_feature)]
#![feature(aarch64_target_feature)]
#![feature(powerpc_target_feature)]
#![allow(unused_attributes)]
#[macro_use]
extern crate stdsimd;

5
library/stdarch/crates/coresimd/tests/v128.rs
View File

@@ -1,8 +1,7 @@
//! coresimd 128-bit wide vector tests
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float,
cfg_target_feature)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float)]
#![allow(unused_imports, dead_code)]
#[cfg(test)]

5
library/stdarch/crates/coresimd/tests/v16.rs
View File

@@ -1,8 +1,7 @@
//! coresimd 16-bit wide vector tests
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float,
cfg_target_feature)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float)]
#![allow(unused_imports, dead_code)]
#[cfg(test)]

5
library/stdarch/crates/coresimd/tests/v256.rs
View File

@@ -1,8 +1,7 @@
//! coresimd 256-bit wide vector tests
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float,
cfg_target_feature)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float)]
#![allow(unused_imports)]
#[cfg(test)]

5
library/stdarch/crates/coresimd/tests/v32.rs
View File

@@ -1,8 +1,7 @@
//! coresimd 32-bit wide vector tests
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float,
cfg_target_feature)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float)]
#![allow(unused_imports, dead_code)]
#[cfg(test)]

5
library/stdarch/crates/coresimd/tests/v512.rs
View File

@@ -1,8 +1,7 @@
//! coresimd 512-bit wide vector tests
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float,
cfg_target_feature)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float)]
#![allow(unused_imports)]
#[cfg(test)]

5
library/stdarch/crates/coresimd/tests/v64.rs
View File

@@ -1,8 +1,7 @@
//! coresimd 64-bit wide vector tests
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float,
cfg_target_feature)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![feature(stdsimd, link_llvm_intrinsics, simd_ffi, core_float)]
#![allow(unused_imports, dead_code)]
#[cfg(test)]

29
library/stdarch/crates/simd-test-macro/src/lib.rs
View File

@@ -25,31 +25,30 @@ pub fn simd_test(
let tokens = TokenStream::from(attr)
.into_iter()
.collect::<Vec<_>>();
if tokens.len() != 2 {
panic!("expected #[simd_test = \"feature\"]");
if tokens.len() != 3 {
panic!("expected #[simd_test(enable = \"feature\")]");
}
match &tokens[0] {
TokenTree::Op(tt) if tt.op() == '=' => {}
_ => panic!("expected #[simd_test = \"feature\"]"),
TokenTree::Term(tt) if tt.to_string() == "enable" => {}
_ => panic!("expected #[simd_test(enable = \"feature\")]"),
}
let target_features = match &tokens[1] {
match &tokens[1] {
TokenTree::Op(tt) if tt.op() == '=' => {}
_ => panic!("expected #[simd_test(enable = \"feature\")]"),
}
let enable_feature = match &tokens[2] {
TokenTree::Literal(tt) => tt.to_string(),
_ => panic!("expected #[simd_test = \"feature\"]"),
_ => panic!("expected #[simd_test(enable = \"feature\")]"),
};
let target_features: Vec<String> = target_features
.replace('"', "")
let enable_feature = enable_feature
.trim_left_matches('"')
.trim_right_matches('"');
let target_features: Vec<String> = enable_feature
.replace('+', "")
.split(',')
.map(|v| String::from(v))
.collect();
let enable_feature = match &tokens[1] {
TokenTree::Literal(tt) => tt.to_string(),
_ => panic!("expected #[simd_test = \"feature\"]"),
};
let enable_feature = enable_feature
.trim_left_matches('"')
.trim_right_matches('"');
let enable_feature = string(enable_feature);
let item = TokenStream::from(item);
let name = find_name(item.clone());

7
library/stdarch/crates/stdsimd/Cargo.toml
View File

@@ -29,13 +29,6 @@ quickcheck = "0.6"
rand = "0.4"
cupid = "0.5.0"
[features]
# Internal-usage only: denies all warnings.
strict = [ "coresimd/strict" ]
# Internal-usage only: enables only those intrinsics supported by Intel's
# Software Development Environment (SDE).
intel_sde = [ "coresimd/intel_sde" ]
[[example]]
name = "hex"
path = "../../examples/hex.rs"

2
library/stdarch/crates/stdsimd/src/lib.rs
View File

@@ -8,7 +8,7 @@
//! [stdsimd]: https://rust-lang-nursery.github.io/stdsimd/x86_64/stdsimd/
#![feature(const_fn, integer_atomics, staged_api, stdsimd)]
#![feature(cfg_target_feature, doc_cfg, allow_internal_unstable)]
#![feature(doc_cfg, allow_internal_unstable)]
#![cfg_attr(feature = "cargo-clippy", allow(shadow_reuse))]
#![cfg_attr(target_os = "linux", feature(linkage))]
#![no_std]

4
library/stdarch/crates/stdsimd/tests/cpu-detection.rs
View File

@@ -1,5 +1,5 @@
#![feature(cfg_target_feature, stdsimd)]
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(stdsimd)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![cfg_attr(feature = "cargo-clippy",
allow(option_unwrap_used, use_debug, print_stdout))]

2
library/stdarch/examples/hex.rs
View File

@@ -12,7 +12,7 @@
//!
//! and you should see `746573740a` get printed out.
#![feature(cfg_target_feature, target_feature, stdsimd)]
#![feature(stdsimd)]
#![cfg_attr(test, feature(test))]
#![cfg_attr(feature = "cargo-clippy",
allow(result_unwrap_used, print_stdout, option_unwrap_used,

5
library/stdarch/examples/nbody.rs
View File

@@ -3,9 +3,8 @@
//! [bg]: https://benchmarksgame.alioth.debian.org/u64q/nbody-description.
//! html#nbody
#![cfg_attr(feature = "strict", deny(warnings))]
#![feature(cfg_target_feature, stdsimd)]
#![feature(target_feature)]
#![cfg_attr(stdsimd_strict, deny(warnings))]
#![feature(stdsimd)]
#![cfg_attr(feature = "cargo-clippy",
allow(similar_names, missing_docs_in_private_items,
shadow_reuse, print_stdout))]

2
library/stdarch/stdsimd/arch/detect/cache.rs
View File

@@ -135,7 +135,7 @@ impl Cache {
/// initializes it with the result of `f()`.
///
/// On its first invocation, it detects the CPU features and caches them in the
/// `FEATURES` global variable as an `AtomicU64`.
/// `CACHE` global variable as an `AtomicU64`.
///
/// It uses the `Feature` variant to index into this variable as a bitset. If
/// the bit is set, the feature is enabled, and otherwise it is disabled.