Implement additional functions

crates/core_simd/src/macros.rs

@@ -139,31 +139,27 @@ macro_rules! call_counting_args {
 macro_rules! impl_vector {
     { $name:ident, $type:ty } => {
         impl<const LANES: usize> $name<LANES> {
-            /// Construct a vector by setting all lanes to the given value.
+            /// Construct a SIMD vector by setting all lanes to the given value.
             pub const fn splat(value: $type) -> Self {
                 Self([value; LANES])
             }
 
+            /// Returns a slice containing the entire SIMD vector.
             pub const fn as_slice(&self) -> &[$type] {
                 &self.0
             }
 
+            /// Returns a mutable slice containing the entire SIMD vector.
             pub fn as_mut_slice(&mut self) -> &mut [$type] {
                 &mut self.0
             }
 
-            pub const fn as_ptr(&self) -> *const $type {
+            /// Converts an array to a SIMD vector.
-                self.0.as_ptr()
-            }
-
-            pub fn as_mut_ptr(&mut self) -> *mut $type {
-                self.0.as_mut_ptr()
-            }
-
             pub const fn from_array(array: [$type; LANES]) -> Self {
                 Self(array)
             }
 
+            /// Converts a SIMD vector to an array.
             pub const fn to_array(self) -> [$type; LANES] {
                 self.0
             }
@@ -250,7 +246,7 @@ macro_rules! impl_vector {
 
 /// Implements additional integer traits (Eq, Ord, Hash) on the specified vector `$name`, holding multiple `$lanes` of `$type`.
 macro_rules! impl_integer_vector {
-    { $name:path, $type:ty } => {
+    { $name:ident, $type:ty } => {
         impl_vector! { $name, $type }
 
         impl<const LANES: usize> Eq for $name<LANES> {}
@@ -279,22 +275,26 @@ macro_rules! impl_integer_vector {
 /// `$lanes` of float `$type`, which uses `$bits_ty` as its binary
 /// representation. Called from `define_float_vector!`.
 macro_rules! impl_float_vector {
-    { $name:path => [$type:ty; $lanes:literal]; bits $bits_ty:ty; } => {
+    { $name:ident, $type:ty, $bits_ty:ident } => {
-        impl $name {
+        impl_vector! { $name, $type }
-//            /// Raw transmutation to an unsigned integer vector type with the
+
-//            /// same size and number of lanes.
+        impl<const LANES: usize> $name<LANES> {
-//            #[inline]
+            /// Raw transmutation to an unsigned integer vector type with the
-//            pub fn to_bits(self) -> $bits_ty {
+            /// same size and number of lanes.
-//                unsafe { core::mem::transmute(self) }
+            #[inline]
-//            }
+            pub fn to_bits(self) -> crate::$bits_ty<LANES> {
-//
+                assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
-//            /// Raw transmutation from an unsigned integer vector type with the
+                unsafe { core::mem::transmute_copy(&self) }
-//            /// same size and number of lanes.
+            }
-//            #[inline]
+
-//            pub fn from_bits(bits: $bits_ty) -> Self {
+            /// Raw transmutation from an unsigned integer vector type with the
-//                unsafe { core::mem::transmute(bits) }
+            /// same size and number of lanes.
-//            }
+            #[inline]
-//
+            pub fn from_bits(bits: crate::$bits_ty<LANES>) -> Self {
+                assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
+                unsafe { core::mem::transmute_copy(&bits) }
+            }
+
 //            /// Produces a vector where every lane has the absolute value of the
 //            /// equivalently-indexed lane in `self`.
 //            #[inline]

crates/core_simd/src/vectors_f32.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdF32<const LANES: usize>([f32; LANES]);
 
-impl_vector! { SimdF32, f32 }
+impl_float_vector! { SimdF32, f32, SimdU32 }
 
 pub type f32x2 = SimdF32<2>;
 pub type f32x4 = SimdF32<4>;

crates/core_simd/src/vectors_f64.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdF64<const LANES: usize>([f64; LANES]);
 
-impl_vector! { SimdF64, f64 }
+impl_float_vector! { SimdF64, f64, SimdU64 }
 
 pub type f64x2 = SimdF64<2>;
 pub type f64x4 = SimdF64<4>;

crates/core_simd/src/vectors_i128.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdI128<const LANES: usize>([i128; LANES]);
 
-impl_vector! { SimdI128, i128 }
+impl_integer_vector! { SimdI128, i128 }
 
 pub type i128x2 = SimdI128<2>;
 pub type i128x4 = SimdI128<4>;

crates/core_simd/src/vectors_i16.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdI16<const LANES: usize>([i16; LANES]);
 
-impl_vector! { SimdI16, i16 }
+impl_integer_vector! { SimdI16, i16 }
 
 pub type i16x4 = SimdI16<4>;
 pub type i16x8 = SimdI16<8>;

crates/core_simd/src/vectors_i32.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdI32<const LANES: usize>([i32; LANES]);
 
-impl_vector! { SimdI32, i32 }
+impl_integer_vector! { SimdI32, i32 }
 
 pub type i32x2 = SimdI32<2>;
 pub type i32x4 = SimdI32<4>;

crates/core_simd/src/vectors_i64.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdI64<const LANES: usize>([i64; LANES]);
 
-impl_vector! { SimdI64, i64 }
+impl_integer_vector! { SimdI64, i64 }
 
 pub type i64x2 = SimdI64<2>;
 pub type i64x4 = SimdI64<4>;

crates/core_simd/src/vectors_i8.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdI8<const LANES: usize>([i8; LANES]);
 
-impl_vector! { SimdI8, i8 }
+impl_integer_vector! { SimdI8, i8 }
 
 pub type i8x8 = SimdI8<8>;
 pub type i8x16 = SimdI8<16>;

crates/core_simd/src/vectors_isize.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdIsize<const LANES: usize>([isize; LANES]);
 
-impl_vector! { SimdIsize, isize }
+impl_integer_vector! { SimdIsize, isize }
 
 pub type isizex2 = SimdIsize<2>;
 pub type isizex4 = SimdIsize<4>;

crates/core_simd/src/vectors_u128.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdU128<const LANES: usize>([u128; LANES]);
 
-impl_vector! { SimdU128, u128 }
+impl_integer_vector! { SimdU128, u128 }
 
 pub type u128x2 = SimdU128<2>;
 pub type u128x4 = SimdU128<4>;

crates/core_simd/src/vectors_u16.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdU16<const LANES: usize>([u16; LANES]);
 
-impl_vector! { SimdU16, u16 }
+impl_integer_vector! { SimdU16, u16 }
 
 pub type u16x4 = SimdU16<4>;
 pub type u16x8 = SimdU16<8>;

crates/core_simd/src/vectors_u32.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdU32<const LANES: usize>([u32; LANES]);
 
-impl_vector! { SimdU32, u32 }
+impl_integer_vector! { SimdU32, u32 }
 
 pub type u32x2 = SimdU32<2>;
 pub type u32x4 = SimdU32<4>;

crates/core_simd/src/vectors_u64.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdU64<const LANES: usize>([u64; LANES]);
 
-impl_vector! { SimdU64, u64 }
+impl_integer_vector! { SimdU64, u64 }
 
 pub type u64x2 = SimdU64<2>;
 pub type u64x4 = SimdU64<4>;

crates/core_simd/src/vectors_u8.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdU8<const LANES: usize>([u8; LANES]);
 
-impl_vector! { SimdU8, u8 }
+impl_integer_vector! { SimdU8, u8 }
 
 pub type u8x8 = SimdU8<8>;
 pub type u8x16 = SimdU8<16>;

crates/core_simd/src/vectors_usize.rs

@@ -4,7 +4,7 @@
 #[repr(simd)]
 pub struct SimdUsize<const LANES: usize>([usize; LANES]);
 
-impl_vector! { SimdUsize, usize }
+impl_integer_vector! { SimdUsize, usize }
 
 pub type usizex2 = SimdUsize<2>;
 pub type usizex4 = SimdUsize<4>;