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Use llvm_asm! instead of asm! (#846)

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Amanieu d'Antras
2020-04-09 00:05:10 +01:00
committed by GitHub
parent 70f3623b52
commit 04c1a9a9e9
13 changed files with 85 additions and 85 deletions
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6
library/stdarch/crates/std_detect/src/detect/os/aarch64.rs
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@@ -34,7 +34,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
// ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0
let aa64isar0: u64;
unsafe {
asm!("mrs $0, ID_AA64ISAR0_EL1" : "=r"(aa64isar0));
llvm_asm!("mrs $0, ID_AA64ISAR0_EL1" : "=r"(aa64isar0));
}
let aes = bits_shift(aa64isar0, 7, 4) >= 1;
@@ -50,7 +50,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
// ID_AA64PFR0_EL1 - Processor Feature Register 0
let aa64pfr0: u64;
unsafe {
asm!("mrs $0, ID_AA64PFR0_EL1" : "=r"(aa64pfr0));
llvm_asm!("mrs $0, ID_AA64PFR0_EL1" : "=r"(aa64pfr0));
}
let fp = bits_shift(aa64pfr0, 19, 16) < 0xF;
@@ -73,7 +73,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
// ID_AA64ISAR1_EL1 - Instruction Set Attribute Register 1
let aa64isar1: u64;
unsafe {
asm!("mrs $0, ID_AA64ISAR1_EL1" : "=r"(aa64isar1));
llvm_asm!("mrs $0, ID_AA64ISAR1_EL1" : "=r"(aa64isar1));
}
enable_feature(Feature::rcpc, bits_shift(aa64isar1, 23, 20) >= 1);