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Use llvm_asm! instead of asm! (#846)

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This commit is contained in:
Amanieu d'Antras
2020-04-09 00:05:10 +01:00
committed by GitHub
parent 70f3623b52
commit 04c1a9a9e9
13 changed files with 85 additions and 85 deletions
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6
library/stdarch/crates/core_arch/src/acle/barrier/cp15.rs
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@@ -8,20 +8,20 @@ pub struct SY;
impl super::super::sealed::Dmb for SY {
#[inline(always)]
unsafe fn __dmb(&self) {
asm!("mcr p15, 0, r0, c7, c10, 5" : : : "memory" : "volatile")
llvm_asm!("mcr p15, 0, r0, c7, c10, 5" : : : "memory" : "volatile")
}
}
impl super::super::sealed::Dsb for SY {
#[inline(always)]
unsafe fn __dsb(&self) {
asm!("mcr p15, 0, r0, c7, c10, 4" : : : "memory" : "volatile")
llvm_asm!("mcr p15, 0, r0, c7, c10, 4" : : : "memory" : "volatile")
}
}
impl super::super::sealed::Isb for SY {
#[inline(always)]
unsafe fn __isb(&self) {
asm!("mcr p15, 0, r0, c7, c5, 4" : : : "memory" : "volatile")
llvm_asm!("mcr p15, 0, r0, c7, c5, 4" : : : "memory" : "volatile")
}
}

4
library/stdarch/crates/core_arch/src/acle/hints.rs
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@@ -85,7 +85,7 @@ pub unsafe fn __yield() {
pub unsafe fn __dbg(imm4: u32) {
macro_rules! call {
($imm4:expr) => {
asm!(concat!("DBG ", stringify!($imm4)) : : : : "volatile")
llvm_asm!(concat!("DBG ", stringify!($imm4)) : : : : "volatile")
}
}
@@ -117,7 +117,7 @@ pub unsafe fn __dbg(imm4: u32) {
/// will increase execution time.
#[inline(always)]
pub unsafe fn __nop() {
asm!("NOP" : : : : "volatile")
llvm_asm!("NOP" : : : : "volatile")
}
extern "C" {

8
library/stdarch/crates/core_arch/src/acle/registers/mod.rs
View File

@@ -4,7 +4,7 @@ macro_rules! rsr {
impl super::super::sealed::Rsr for $R {
unsafe fn __rsr(&self) -> u32 {
let r: u32;
asm!(concat!("mrs $0,", stringify!($R)) : "=r"(r) : : : "volatile");
llvm_asm!(concat!("mrs $0,", stringify!($R)) : "=r"(r) : : : "volatile");
r
}
}
@@ -17,7 +17,7 @@ macro_rules! rsrp {
impl super::super::sealed::Rsrp for $R {
unsafe fn __rsrp(&self) -> *const u8 {
let r: *const u8;
asm!(concat!("mrs $0,", stringify!($R)) : "=r"(r) : : : "volatile");
llvm_asm!(concat!("mrs $0,", stringify!($R)) : "=r"(r) : : : "volatile");
r
}
}
@@ -29,7 +29,7 @@ macro_rules! wsr {
($R:ident) => {
impl super::super::sealed::Wsr for $R {
unsafe fn __wsr(&self, value: u32) {
asm!(concat!("msr ", stringify!($R), ",$0") : : "r"(value) : : "volatile");
llvm_asm!(concat!("msr ", stringify!($R), ",$0") : : "r"(value) : : "volatile");
}
}
};
@@ -40,7 +40,7 @@ macro_rules! wsrp {
($R:ident) => {
impl super::super::sealed::Wsrp for $R {
unsafe fn __wsrp(&self, value: *const u8) {
asm!(concat!("msr ", stringify!($R), ",$0") : : "r"(value) : : "volatile");
llvm_asm!(concat!("msr ", stringify!($R), ",$0") : : "r"(value) : : "volatile");
}
}
};

4
library/stdarch/crates/core_arch/src/arm/armclang.rs
View File

@@ -51,14 +51,14 @@ pub unsafe fn __breakpoint(val: i32) {
#[cfg(target_arch = "arm")]
macro_rules! call {
($imm8:expr) => {
asm!(concat!("BKPT ", stringify!($imm8)) : : : : "volatile")
llvm_asm!(concat!("BKPT ", stringify!($imm8)) : : : : "volatile")
}
}
#[cfg(target_arch = "aarch64")]
macro_rules! call {
($imm8:expr) => {
asm!(concat!("BRK ", stringify!($imm8)) : : : : "volatile")
llvm_asm!(concat!("BRK ", stringify!($imm8)) : : : : "volatile")
}
}

2
library/stdarch/crates/core_arch/src/lib.rs
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@@ -9,7 +9,7 @@
platform_intrinsics,
repr_simd,
simd_ffi,
asm,
llvm_asm,
proc_macro_hygiene,
stmt_expr_attributes,
core_intrinsics,

32
library/stdarch/crates/core_arch/src/x86/bt.rs
View File

@@ -7,10 +7,10 @@ use stdarch_test::assert_instr;
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
pub unsafe fn _bittest(p: *const i32, b: i32) -> u8 {
let r: u8;
asm!("btl $2, $1\n\tsetc ${0:b}"
: "=r"(r)
: "*m"(p), "r"(b)
: "cc", "memory");
llvm_asm!("btl $2, $1\n\tsetc ${0:b}"
: "=r"(r)
: "*m"(p), "r"(b)
: "cc", "memory");
r
}
@@ -20,10 +20,10 @@ pub unsafe fn _bittest(p: *const i32, b: i32) -> u8 {
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
pub unsafe fn _bittestandset(p: *mut i32, b: i32) -> u8 {
let r: u8;
asm!("btsl $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
llvm_asm!("btsl $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
r
}
@@ -33,10 +33,10 @@ pub unsafe fn _bittestandset(p: *mut i32, b: i32) -> u8 {
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
pub unsafe fn _bittestandreset(p: *mut i32, b: i32) -> u8 {
let r: u8;
asm!("btrl $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
llvm_asm!("btrl $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
r
}
@@ -46,10 +46,10 @@ pub unsafe fn _bittestandreset(p: *mut i32, b: i32) -> u8 {
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
pub unsafe fn _bittestandcomplement(p: *mut i32, b: i32) -> u8 {
let r: u8;
asm!("btcl $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
llvm_asm!("btcl $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
r
}

62
library/stdarch/crates/core_arch/src/x86/cpuid.rs
View File

@@ -57,18 +57,18 @@ pub unsafe fn __cpuid_count(leaf: u32, sub_leaf: u32) -> CpuidResult {
let edx;
#[cfg(target_arch = "x86")]
{
asm!("cpuid"
: "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx)
: "{eax}"(leaf), "{ecx}"(sub_leaf)
: :);
llvm_asm!("cpuid"
: "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx)
: "{eax}"(leaf), "{ecx}"(sub_leaf)
: :);
}
#[cfg(target_arch = "x86_64")]
{
// x86-64 uses %rbx as the base register, so preserve it.
asm!("cpuid"
: "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx)
: "{eax}"(leaf), "{ecx}"(sub_leaf)
: "rbx" :);
llvm_asm!("cpuid"
: "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx)
: "{eax}"(leaf), "{ecx}"(sub_leaf)
: "rbx" :);
}
CpuidResult { eax, ebx, ecx, edx }
}
@@ -113,29 +113,29 @@ pub fn has_cpuid() -> bool {
// If it is, then `cpuid` is available.
let result: u32;
let _temp: u32;
asm!(r#"
# Read eflags into $0 and copy it into $1:
pushfd
pop $0
mov $1, $0
# Flip 21st bit of $0.
xor $0, 0x200000
# Set eflags to the value of $0
#
# Bit 21st can only be modified if cpuid is available
push $0
popfd # A
# Read eflags into $0:
pushfd # B
pop $0
# xor with the original eflags sets the bits that
# have been modified:
xor $0, $1
"#
: "=r"(result), "=r"(_temp)
:
: "cc", "memory"
: "intel");
llvm_asm!(r#"
# Read eflags into $0 and copy it into $1:
pushfd
pop $0
mov $1, $0
# Flip 21st bit of $0.
xor $0, 0x200000
# Set eflags to the value of $0
#
# Bit 21st can only be modified if cpuid is available
push $0
popfd # A
# Read eflags into $0:
pushfd # B
pop $0
# xor with the original eflags sets the bits that
# have been modified:
xor $0, $1
"#
: "=r"(result), "=r"(_temp)
:
: "cc", "memory"
: "intel");
// There is a race between popfd (A) and pushfd (B)
// where other bits beyond 21st may have been modified due to
// interrupts, a debugger stepping through the asm, etc.

8
library/stdarch/crates/core_arch/src/x86/eflags.rs
View File

@@ -13,7 +13,7 @@
#[doc(hidden)]
pub unsafe fn __readeflags() -> u32 {
let eflags: u32;
asm!("pushfd; popl $0" : "=r"(eflags) : : : "volatile");
llvm_asm!("pushfd; popl $0" : "=r"(eflags) : : : "volatile");
eflags
}
@@ -30,7 +30,7 @@ pub unsafe fn __readeflags() -> u32 {
#[doc(hidden)]
pub unsafe fn __readeflags() -> u64 {
let eflags: u64;
asm!("pushfq; popq $0" : "=r"(eflags) : : : "volatile");
llvm_asm!("pushfq; popq $0" : "=r"(eflags) : : : "volatile");
eflags
}
@@ -46,7 +46,7 @@ pub unsafe fn __readeflags() -> u64 {
)]
#[doc(hidden)]
pub unsafe fn __writeeflags(eflags: u32) {
asm!("pushl $0; popfd" : : "r"(eflags) : "cc", "flags" : "volatile");
llvm_asm!("pushl $0; popfd" : : "r"(eflags) : "cc", "flags" : "volatile");
}
/// Write EFLAGS.
@@ -61,7 +61,7 @@ pub unsafe fn __writeeflags(eflags: u32) {
)]
#[doc(hidden)]
pub unsafe fn __writeeflags(eflags: u64) {
asm!("pushq $0; popfq" : : "r"(eflags) : "cc", "flags" : "volatile");
llvm_asm!("pushq $0; popfq" : : "r"(eflags) : "cc", "flags" : "volatile");
}
#[cfg(test)]

2
library/stdarch/crates/core_arch/src/x86/xsave.rs
View File

@@ -87,7 +87,7 @@ pub unsafe fn _xsetbv(a: u32, val: u64) {
pub unsafe fn _xgetbv(xcr_no: u32) -> u64 {
let eax: u32;
let edx: u32;
asm!("xgetbv" : "={eax}"(eax), "={edx}"(edx) : "{ecx}"(xcr_no));
llvm_asm!("xgetbv" : "={eax}"(eax), "={edx}"(edx) : "{ecx}"(xcr_no));
((edx as u64) << 32) | (eax as u64)
}

32
library/stdarch/crates/core_arch/src/x86_64/bt.rs
View File

@@ -7,10 +7,10 @@ use stdarch_test::assert_instr;
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
pub unsafe fn _bittest64(p: *const i64, b: i64) -> u8 {
let r: u8;
asm!("btq $2, $1\n\tsetc ${0:b}"
: "=r"(r)
: "*m"(p), "r"(b)
: "cc", "memory");
llvm_asm!("btq $2, $1\n\tsetc ${0:b}"
: "=r"(r)
: "*m"(p), "r"(b)
: "cc", "memory");
r
}
@@ -20,10 +20,10 @@ pub unsafe fn _bittest64(p: *const i64, b: i64) -> u8 {
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
pub unsafe fn _bittestandset64(p: *mut i64, b: i64) -> u8 {
let r: u8;
asm!("btsq $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
llvm_asm!("btsq $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
r
}
@@ -33,10 +33,10 @@ pub unsafe fn _bittestandset64(p: *mut i64, b: i64) -> u8 {
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
pub unsafe fn _bittestandreset64(p: *mut i64, b: i64) -> u8 {
let r: u8;
asm!("btrq $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
llvm_asm!("btrq $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
r
}
@@ -46,10 +46,10 @@ pub unsafe fn _bittestandreset64(p: *mut i64, b: i64) -> u8 {
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
pub unsafe fn _bittestandcomplement64(p: *mut i64, b: i64) -> u8 {
let r: u8;
asm!("btcq $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
llvm_asm!("btcq $2, $1\n\tsetc ${0:b}"
: "=r"(r), "+*m"(p)
: "r"(b)
: "cc", "memory");
r
}