Update SMP TODO
This commit is contained in:
12
Makefile
12
Makefile
@@ -13,7 +13,7 @@ QEMU ?= qemu-system-i386
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RUN ?= bios_hello_world
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TMP_EXT ?= .tmp
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OUTS := $(foreach IN_EXT,$(NASM_EXT) $(GAS_EXT),$(patsubst %$(IN_EXT),%$(OUT_EXT),$(wildcard *$(IN_EXT))))
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OUTS := $(sort $(foreach IN_EXT,$(NASM_EXT) $(GAS_EXT),$(patsubst %$(IN_EXT),%$(OUT_EXT),$(wildcard *$(IN_EXT)))))
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RUN_FILE := $(RUN)$(OUT_EXT)
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.PRECIOUS: %$(OBJ_EXT)
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@@ -38,14 +38,14 @@ $(COMMON):
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clean:
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rm -fr *$(OBJ_EXT) *$(OUT_EXT) *$(TMP_EXT)
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run: all
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run: $(RUN_FILE)
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$(QEMU) -drive 'file=$(RUN_FILE),format=raw' -smp 2
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debug: all
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debug: $(RUN_FILE)
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$(QEMU) -hda '$(RUN_FILE)' -S -s &
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gdb -x gdb.gdb
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bochs: all
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bochs: $(RUN_FILE)
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# Supposes size is already multiples of 512.
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# We force that with our linker script,
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# and `grub-mkrescue` also seems to respect it as well.
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@@ -59,7 +59,7 @@ bochs: all
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BIG_IMG_DIR := big_img$(TMP_EXT)
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BOOT_DIR := $(BIG_IMG_DIR)/boot
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GRUB_DIR := $(BOOT_DIR)/grub
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big-img: all
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big$(OUT_EXT): all
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rm -rf '$(BIG_IMG_DIR)'
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mkdir -p '$(GRUB_DIR)'
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for out in $(OUTS); do\
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@@ -71,4 +71,4 @@ big-img: all
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#mkdir -p '$(BOOT_DIR)/multiboot'
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#printf "menuentry \"multiboot/hello-world\" {\n chainloader /boot/multiboot/hello-world.img\n}\n" >> '$(GRUB_DIR)/grub.cfg';\
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#cp multiboot/hello-world/main.img '$(BOOT_DIR)/multiboot/hello-world.img'
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grub-mkrescue -o 'big.img' '$(BIG_IMG_DIR)'
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grub-mkrescue -o '$@' '$(BIG_IMG_DIR)'
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10
TODO.md
10
TODO.md
@@ -1,7 +1,13 @@
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# TODO
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-
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http://stackoverflow.com/questions/1858640/how-can-i-create-a-sleep-function-in-16bit-masm-assembly-x86
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- SMP sync
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- MONITOR/MWAIT
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- LOCK prefix
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- MFENCE
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- LFENCE
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- SFENCE
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- http://stackoverflow.com/a/33651438/895245
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- cache:
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26
smp.S
26
smp.S
@@ -3,25 +3,7 @@
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Expected output: "SMP started"
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TODO get working + answer all of:
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- http://stackoverflow.com/questions/16364817/assessing-the-apic-and-creating-ipis-in-x86-assembly
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Closest quesiton so far! Almost there!
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Table 8-1. Broadcast INIT-SIPI-SIPI Sequence and Choice of Timeouts contains actual code!
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TODO: how to sleep the right ammount of time?
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- http://stackoverflow.com/questions/15091165/inter-processor-interrupt-usage
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- http://stackoverflow.com/questions/1516530/assembly-and-multicore-cpus?lq=1
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- http://stackoverflow.com/questions/1622388/running-code-on-different-processor-x86-assembly
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- http://stackoverflow.com/questions/26452323/how-can-we-use-multi-core-and-cpu-on-assembly-boot-loader-x86
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- http://stackoverflow.com/questions/2986931/the-way-cores-processes-and-threads-work-exactly?rq=1
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- http://stackoverflow.com/questions/419486/multithreading-and-interrupts
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- http://stackoverflow.com/questions/663958/how-to-control-which-core-a-process-runs-on
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- http://stackoverflow.com/questions/714905/threads-in-x86-assembler-using-the-gnu-assember-as
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- http://stackoverflow.com/questions/7308391/how-is-concurrency-done-in-intel-x86-assembly
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- http://stackoverflow.com/questions/980999/what-does-multicore-assembly-language-look-like
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- http://stackoverflow.com/questions/28047092/by-which-instruction-the-secondary-core-is-triggered-while-starting-the-secondar?rq=1
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- http://stackoverflow.com/questions/23962839/how-to-correctly-use-a-startup-ipi-to-start-an-application-processor?rq=1
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- https://github.com/cirosantilli/oszur11-operating-system-examples/tree/1af6451852887fac3d7206d4d09714c181c81d1e/Chapter_07_Threads
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The hard part is sleeping the right amount of time as required by Intel: this example uses the PIT.
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*/
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/* Must be a multiple of 0x1000. */
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@@ -116,7 +98,11 @@ init:
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xor %ax, %ax
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mov %ax, %ds
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movb $1, SPINLOCK_ADDRESS
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/* TODO mandatory? Is lock prefix enough? */
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/*
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TODO mandatory?
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- is lock prefix enough?
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- is caching even on I think not because it is off
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*/
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wbinvd
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hlt
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.equ init_len, . - init
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33
smp.md
33
smp.md
@@ -2,15 +2,9 @@
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# Symmetric multiprocessing
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At fist, a single processor starts.
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Read this first: <http://stackoverflow.com/questions/980999/what-does-multicore-assembly-language-look-like/33651438#33651438>
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To start the others, the first processor must tell the APIC to send a few special interrupts to the other processors.
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One of those interrupts says where the there processors start running their first instruction from.
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- Intel docs: Volume 3, Chapter 8 "Multiple processor Management".
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Does not seem standardized across to AMD.
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- Does not seem standardized across to AMD.
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On Intel goes through the APIC to generate an interrupt across processors:
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@@ -20,8 +14,6 @@ One of those interrupts says where the there processors start running their firs
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- <https://en.wikipedia.org/wiki/Inter-processor_interrupt>
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- Linux kernel `arch/x86/kernel/smpboot.c`
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- newer Intel processors have an L2 shared across cores:
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- http://stackoverflow.com/questions/4802565/multiple-threads-and-cpu-cache
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@@ -55,19 +47,10 @@ processors on the system bus as the BSP. The remaining processors are designated
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message) from the BSP processor. Upon receiving a SIPI message, an AP executes the BIOS AP configuration code,
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which ends with the AP being placed in halt state.
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## AP
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Bibliography:
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Application processor: all processors except the boot one.
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## ICR
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## Interrupt command register
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When we write to it, interrupts are sent.
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It is memory mapped to `0xFEE0 0300`.
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[Intel Manual Volume 3 System Programming Guide - 325384-056US September 2015](https://web.archive.org/web/20151025081259/http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-system-programming-manual-325384.pdf)
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- 10.6 "ISSUING INTERPROCESSOR INTERRUPTS" documents its format
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- Table 10-1 Local APIC Register Address Map documents where it is mapped to in memory
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- http://stackoverflow.com/questions/16364817/assessing-the-apic-and-creating-ipis-in-x86-assembly
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- http://stackoverflow.com/questions/980999/what-does-multicore-assembly-language-look-like
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- http://stackoverflow.com/questions/1622388/running-code-on-different-processor-x86-assembly
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- http://stackoverflow.com/questions/1516530/assembly-and-multicore-cpus?lq=1
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- http://stackoverflow.com/questions/663958/how-to-control-which-core-a-process-runs-on
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